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[14/16] intel: Add is_855ish for handling 855 and 865 specific lod clamping

Message ID 1307475261-32695-15-git-send-email-krh@bitplanet.net (mailing list archive)
State New, archived
Headers show

Commit Message

Kristian Hogsberg June 7, 2011, 7:34 p.m. UTC 
---
 include/pci_ids/i915_pci_ids.h            |    4 ++--
 src/mesa/drivers/dri/i915/i830_texstate.c |    3 +--
 src/mesa/drivers/dri/intel/intel_screen.c |    4 ++++
 src/mesa/drivers/dri/intel/intel_screen.h |    2 +-
 4 files changed, 8 insertions(+), 5 deletions(-)

Comments

Eric Anholt June 8, 2011, 1:13 a.m. UTC | #1 
On Tue, 07 Jun 2011 21:22:28 +0100, Chris Wilson <chris@chris-wilson.co.uk> wrote:
> On Tue,  7 Jun 2011 15:34:19 -0400, Kristian Høgsberg <krh@bitplanet.net> wrote:
> >  struct intel_chipset {
> >     int gen;
> > -   GLboolean is_945, is_g4x;
> > +   GLboolean is_855ish, is_945, is_g4x;
> >  
> >     /* WM maximum threads is number of EUs times number of threads per EU. */
> >     int wm_max_threads;
> 
> This can be handled by adding a few more bits per-gen. I found using
>   20 830/845
>   21 855/865
>   30 915
>   31 945
>   33 g33 + pnv
>   40 965
>   45 g4x
>   50 ilk
>   60 snb
>   ...to infinity and beyond...
> works quite well for specifying render capabilities for gen2/3/4.

I never liked this.  I much prefer the extra knobs for the few weird
cases (there's *so* little that's g33 as opposed to 945-specific, for
example).
diff mbox

Patch

diff --git a/include/pci_ids/i915_pci_ids.h b/include/pci_ids/i915_pci_ids.h
index 551c010..5b5d1f8 100644
--- a/include/pci_ids/i915_pci_ids.h
+++ b/include/pci_ids/i915_pci_ids.h
@@ -1,7 +1,7 @@ 
 CHIPSET(0x3577, I830_M, i8xx)
 CHIPSET(0x2562, 845_G, i8xx)
-CHIPSET(0x3582, I855_GM, i8xx)
-CHIPSET(0x2572, I865_G, i8xx)
+CHIPSET(0x3582, I855_GM, i855)
+CHIPSET(0x2572, I865_G, i855)
 CHIPSET(0x2582, I915_G, i915)
 CHIPSET(0x258A, E7221_G, i915)
 CHIPSET(0x2592, I915_GM, i915)
diff --git a/src/mesa/drivers/dri/i915/i830_texstate.c b/src/mesa/drivers/dri/i915/i830_texstate.c
index 3298dbb..9100e32 100644
--- a/src/mesa/drivers/dri/i915/i830_texstate.c
+++ b/src/mesa/drivers/dri/i915/i830_texstate.c
@@ -263,8 +263,7 @@  i830_update_tex_unit(struct intel_context *intel, GLuint unit, GLuint ss3)
        */
       minlod_fixed = U_FIXED(CLAMP(sampler->MinLod, 0.0, 11), 4);
       maxlod = MIN2(sampler->MaxLod, tObj->_MaxLevel - tObj->BaseLevel);
-      if (intel->intelScreen->deviceID == PCI_CHIP_I855_GM ||
-	  intel->intelScreen->deviceID == PCI_CHIP_I865_G) {
+      if (intel->intelScreen->chipset.is_855ish) {
 	 maxlod_fixed = U_FIXED(CLAMP(maxlod, 0.0, 11.75), 2);
 	 maxlod_fixed = MAX2(maxlod_fixed, (minlod_fixed + 3) >> 2);
 	 state[I830_TEXREG_TM0S3] |= maxlod_fixed << TM0S3_MIN_MIP_SHIFT;
diff --git a/src/mesa/drivers/dri/intel/intel_screen.c b/src/mesa/drivers/dri/intel/intel_screen.c
index a8732a8..94c39fb 100644
--- a/src/mesa/drivers/dri/intel/intel_screen.c
+++ b/src/mesa/drivers/dri/intel/intel_screen.c
@@ -447,6 +447,10 @@  static const struct intel_chipset intel_chipset_i8xx = {
    .gen = 2
 };
 
+static const struct intel_chipset intel_chipset_i855 = {
+   .gen = 2, .is_855ish = GL_TRUE
+};
+
 static const struct intel_chipset intel_chipset_i915 = {
    .gen = 3
 };
diff --git a/src/mesa/drivers/dri/intel/intel_screen.h b/src/mesa/drivers/dri/intel/intel_screen.h
index 3a3ef40..177f619 100644
--- a/src/mesa/drivers/dri/intel/intel_screen.h
+++ b/src/mesa/drivers/dri/intel/intel_screen.h
@@ -36,7 +36,7 @@ 
 
 struct intel_chipset {
    int gen;
-   GLboolean is_945, is_g4x;
+   GLboolean is_855ish, is_945, is_g4x;
 
    /* WM maximum threads is number of EUs times number of threads per EU. */
    int wm_max_threads;