diff --git a/include/pci_ids/i915_pci_ids.h b/include/pci_ids/i915_pci_ids.h
index 5b5d1f8..4b742d7 100644
--- a/include/pci_ids/i915_pci_ids.h
+++ b/include/pci_ids/i915_pci_ids.h
@@ -1,15 +1,15 @@
-CHIPSET(0x3577, I830_M, i8xx)
-CHIPSET(0x2562, 845_G, i8xx)
-CHIPSET(0x3582, I855_GM, i855)
-CHIPSET(0x2572, I865_G, i855)
-CHIPSET(0x2582, I915_G, i915)
-CHIPSET(0x258A, E7221_G, i915)
-CHIPSET(0x2592, I915_GM, i915)
-CHIPSET(0x2772, I945_G, i945)
-CHIPSET(0x27A2, I945_GM, i945)
-CHIPSET(0x27AE, I945_GME, i945)
-CHIPSET(0x29B2, Q35_G, i945)
-CHIPSET(0x29C2, G33_G, i945)
-CHIPSET(0x29D2, Q33_G, i945)
-CHIPSET(0xA011, IGD_GM, i945)
-CHIPSET(0xA001, IGD_G, i945)
+CHIPSET(0x3577, I830_M, i8xx, "Intel(R) 845G")
+CHIPSET(0x2562, 845_G, i8xx, "Intel(R) 830M")
+CHIPSET(0x3582, I855_GM, i855, "Intel(R) 852GM/855GM")
+CHIPSET(0x2572, I865_G, i855, "Intel(R) 865G")
+CHIPSET(0x2582, I915_G, i915, "Intel(R) 915G")
+CHIPSET(0x258A, E7221_G, i915, "Intel (R) E7221G (i915)")
+CHIPSET(0x2592, I915_GM, i915, "Intel(R) 915GM")
+CHIPSET(0x2772, I945_G, i945, "Intel(R) 945G")
+CHIPSET(0x27A2, I945_GM, i945, "Intel(R) 945GM")
+CHIPSET(0x27AE, I945_GME, i945, "Intel(R) 945GME")
+CHIPSET(0x29B2, Q35_G, i945, "Intel(R) Q35")
+CHIPSET(0x29C2, G33_G, i945, "Intel(R) G33")
+CHIPSET(0x29D2, Q33_G, i945, "Intel(R) Q33")
+CHIPSET(0xA011, IGD_GM, i945, "Intel(R) IGD")
+CHIPSET(0xA001, IGD_G, i945, "Intel(R) IGD")
diff --git a/include/pci_ids/i965_pci_ids.h b/include/pci_ids/i965_pci_ids.h
index d37a2ee..0d9d42f 100644
--- a/include/pci_ids/i965_pci_ids.h
+++ b/include/pci_ids/i965_pci_ids.h
@@ -1,27 +1,27 @@
-CHIPSET(0x29A2, I965_G, i965)
-CHIPSET(0x2992, I965_Q, i965)
-CHIPSET(0x2982, I965_G_1, i965)
-CHIPSET(0x2972, I946_GZ, i965)
-CHIPSET(0x2A02, I965_GM, i965)
-CHIPSET(0x2A12, I965_GME, i965)
-CHIPSET(0x2A42, GM45_GM, g4x)
-CHIPSET(0x2E02, IGD_E_G, g4x)
-CHIPSET(0x2E12, Q45_G, g4x)
-CHIPSET(0x2E22, G45_G, g4x)
-CHIPSET(0x2E32, G41_G, g4x)
-CHIPSET(0x2E42, B43_G, g4x)
-CHIPSET(0x2E92, B43_G1, g4x)
-CHIPSET(0x0042, ILD_G, ilk)
-CHIPSET(0x0046, ILM_G, ilk)
-CHIPSET(0x0102, SANDYBRIDGE_GT1, snb_gt1)
-CHIPSET(0x0112, SANDYBRIDGE_GT2, snb_gt2)
-CHIPSET(0x0122, SANDYBRIDGE_GT2_PLUS, snb_gt2)
-CHIPSET(0x0106, SANDYBRIDGE_M_GT1, snb_gt1)
-CHIPSET(0x0116, SANDYBRIDGE_M_GT2, snb_gt2)
-CHIPSET(0x0126, SANDYBRIDGE_M_GT2_PLUS, snb_gt2)
-CHIPSET(0x010A, SANDYBRIDGE_S, snb_gt1)
-CHIPSET(0x0152, IVYBRIDGE_GT1, ivb_gt1)
-CHIPSET(0x0162, IVYBRIDGE_GT2, ivb_gt2)
-CHIPSET(0x0156, IVYBRIDGE_M_GT1, ivb_gt1)
-CHIPSET(0x0166, IVYBRIDGE_M_GT2, ivb_gt2)
-CHIPSET(0x015a, IVYBRIDGE_S_GT1, ivb_gt1)
+CHIPSET(0x29A2, I965_G, i965, "Intel(R) 965G")
+CHIPSET(0x2992, I965_Q, i965, "Intel(R) 965Q")
+CHIPSET(0x2982, I965_G_1, i965, "Intel(R) 965G")
+CHIPSET(0x2972, I946_GZ, i965, "Intel(R) 946GZ")
+CHIPSET(0x2A02, I965_GM, i965, "Intel(R) 965GM")
+CHIPSET(0x2A12, I965_GME, i965, "Intel(R) 965GME/GLE")
+CHIPSET(0x2A42, GM45_GM, g4x, "Mobile Intel® GM45 Express Chipset")
+CHIPSET(0x2E02, IGD_E_G, g4x, "Intel(R) Integrated Graphics Device")
+CHIPSET(0x2E12, Q45_G, g4x, "Intel(R) Q45/Q43")
+CHIPSET(0x2E22, G45_G, g4x, "Intel(R) G45/G43")
+CHIPSET(0x2E32, G41_G, g4x, "Intel(R) G41")
+CHIPSET(0x2E42, B43_G, g4x, "Intel(R) B43")
+CHIPSET(0x2E92, B43_G1, g4x, "Intel(R) B43")
+CHIPSET(0x0042, ILD_G, ilk, "Intel(R) Ironlake Desktop")
+CHIPSET(0x0046, ILM_G, ilk, "Intel(R) Ironlake Mobile")
+CHIPSET(0x0102, SANDYBRIDGE_GT1, snb_gt1, "Intel(R) Sandybridge Desktop")
+CHIPSET(0x0112, SANDYBRIDGE_GT2, snb_gt2, "Intel(R) Sandybridge Desktop")
+CHIPSET(0x0122, SANDYBRIDGE_GT2_PLUS, snb_gt2, "Intel(R) Sandybridge Desktop")
+CHIPSET(0x0106, SANDYBRIDGE_M_GT1, snb_gt1, "Intel(R) Sandybridge Mobile")
+CHIPSET(0x0116, SANDYBRIDGE_M_GT2, snb_gt2, "Intel(R) Sandybridge Mobile")
+CHIPSET(0x0126, SANDYBRIDGE_M_GT2_PLUS, snb_gt2, "Intel(R) Sandybridge Mobile")
+CHIPSET(0x010A, SANDYBRIDGE_S, snb_gt1, "Intel(R) Sandybridge Server")
+CHIPSET(0x0152, IVYBRIDGE_GT1, ivb_gt1, "Intel(R) Ivybridge Desktop")
+CHIPSET(0x0162, IVYBRIDGE_GT2, ivb_gt2, "Intel(R) Ivybridge Desktop")
+CHIPSET(0x0156, IVYBRIDGE_M_GT1, ivb_gt1, "Intel(R) Ivybridge Mobile")
+CHIPSET(0x0166, IVYBRIDGE_M_GT2, ivb_gt2, "Intel(R) Ivybridge Mobile")
+CHIPSET(0x015a, IVYBRIDGE_S_GT1, ivb_gt1, "Intel(R) Ivybridge Server")
diff --git a/include/pci_ids/pci_id_driver_map.h b/include/pci_ids/pci_id_driver_map.h
index 9112efd..4518b56 100644
--- a/include/pci_ids/pci_id_driver_map.h
+++ b/include/pci_ids/pci_id_driver_map.h
@@ -16,13 +16,13 @@ static const int i810_chip_ids[] = {
 #endif
 
 static const int i915_chip_ids[] = {
-#define CHIPSET(chip, desc, misc) chip,
+#define CHIPSET(chip, desc, misc, str) chip,
 #include "pci_ids/i915_pci_ids.h"
 #undef CHIPSET
 };
 
 static const int i965_chip_ids[] = {
-#define CHIPSET(chip, desc, misc) chip,
+#define CHIPSET(chip, desc, misc, str) chip,
 #include "pci_ids/i965_pci_ids.h"
 #undef CHIPSET
 };
diff --git a/src/mesa/drivers/dri/intel/intel_context.c b/src/mesa/drivers/dri/intel/intel_context.c
index 76c1da5..af0d28d 100644
--- a/src/mesa/drivers/dri/intel/intel_context.c
+++ b/src/mesa/drivers/dri/intel/intel_context.c
@@ -76,117 +76,12 @@ intelGetString(struct gl_context * ctx, GLenum name)
 
    case GL_RENDERER:
       switch (intel->intelScreen->deviceID) {
-      case PCI_CHIP_845_G:
-         chipset = "Intel(R) 845G";
-         break;
-      case PCI_CHIP_I830_M:
-         chipset = "Intel(R) 830M";
-         break;
-      case PCI_CHIP_I855_GM:
-         chipset = "Intel(R) 852GM/855GM";
-         break;
-      case PCI_CHIP_I865_G:
-         chipset = "Intel(R) 865G";
-         break;
-      case PCI_CHIP_I915_G:
-         chipset = "Intel(R) 915G";
-         break;
-      case PCI_CHIP_E7221_G:
-	 chipset = "Intel (R) E7221G (i915)";
-	 break;
-      case PCI_CHIP_I915_GM:
-         chipset = "Intel(R) 915GM";
-         break;
-      case PCI_CHIP_I945_G:
-         chipset = "Intel(R) 945G";
-         break;
-      case PCI_CHIP_I945_GM:
-         chipset = "Intel(R) 945GM";
-         break;
-      case PCI_CHIP_I945_GME:
-         chipset = "Intel(R) 945GME";
-         break;
-      case PCI_CHIP_G33_G:
-	 chipset = "Intel(R) G33";
-	 break;
-      case PCI_CHIP_Q35_G:
-	 chipset = "Intel(R) Q35";
-	 break;
-      case PCI_CHIP_Q33_G:
-	 chipset = "Intel(R) Q33";
-	 break;
-      case PCI_CHIP_IGD_GM:
-      case PCI_CHIP_IGD_G:
-	 chipset = "Intel(R) IGD";
-	 break;
-      case PCI_CHIP_I965_Q:
-	 chipset = "Intel(R) 965Q";
-	 break;
-      case PCI_CHIP_I965_G:
-      case PCI_CHIP_I965_G_1:
-	 chipset = "Intel(R) 965G";
-	 break;
-      case PCI_CHIP_I946_GZ:
-	 chipset = "Intel(R) 946GZ";
-	 break;
-      case PCI_CHIP_I965_GM:
-	 chipset = "Intel(R) 965GM";
-	 break;
-      case PCI_CHIP_I965_GME:
-	 chipset = "Intel(R) 965GME/GLE";
-	 break;
-      case PCI_CHIP_GM45_GM:
-	 chipset = "Mobile Intel® GM45 Express Chipset";
-	 break; 
-      case PCI_CHIP_IGD_E_G:
-	 chipset = "Intel(R) Integrated Graphics Device";
-	 break;
-      case PCI_CHIP_G45_G:
-         chipset = "Intel(R) G45/G43";
-         break;
-      case PCI_CHIP_Q45_G:
-         chipset = "Intel(R) Q45/Q43";
-         break;
-      case PCI_CHIP_G41_G:
-         chipset = "Intel(R) G41";
-         break;
-      case PCI_CHIP_B43_G:
-      case PCI_CHIP_B43_G1:
-         chipset = "Intel(R) B43";
-         break;
-      case PCI_CHIP_ILD_G:
-         chipset = "Intel(R) Ironlake Desktop";
-         break;
-      case PCI_CHIP_ILM_G:
-         chipset = "Intel(R) Ironlake Mobile";
-         break;
-      case PCI_CHIP_SANDYBRIDGE_GT1:
-      case PCI_CHIP_SANDYBRIDGE_GT2:
-      case PCI_CHIP_SANDYBRIDGE_GT2_PLUS:
-	 chipset = "Intel(R) Sandybridge Desktop";
-	 break;
-      case PCI_CHIP_SANDYBRIDGE_M_GT1:
-      case PCI_CHIP_SANDYBRIDGE_M_GT2:
-      case PCI_CHIP_SANDYBRIDGE_M_GT2_PLUS:
-	 chipset = "Intel(R) Sandybridge Mobile";
-	 break;
-      case PCI_CHIP_SANDYBRIDGE_S:
-	 chipset = "Intel(R) Sandybridge Server";
-	 break;
-      case PCI_CHIP_IVYBRIDGE_GT1:
-      case PCI_CHIP_IVYBRIDGE_GT2:
-	 chipset = "Intel(R) Ivybridge Desktop";
-	 break;
-      case PCI_CHIP_IVYBRIDGE_M_GT1:
-      case PCI_CHIP_IVYBRIDGE_M_GT2:
-	 chipset = "Intel(R) Ivybridge Mobile";
-	 break;
-      case PCI_CHIP_IVYBRIDGE_S_GT1:
-	 chipset = "Intel(R) Ivybridge Server";
-	 break;
-      default:
-         chipset = "Unknown Intel Chipset";
-         break;
+
+#define CHIPSET(id, name, info, str) \
+	 case id: chipset = str; break;
+#include "pci_ids/i915_pci_ids.h"
+#include "pci_ids/i965_pci_ids.h"
+
       }
 
       (void) driGetRendererString(buffer, chipset, 0);
diff --git a/src/mesa/drivers/dri/intel/intel_screen.c b/src/mesa/drivers/dri/intel/intel_screen.c
index 94c39fb..6a9395f 100644
--- a/src/mesa/drivers/dri/intel/intel_screen.c
+++ b/src/mesa/drivers/dri/intel/intel_screen.c
@@ -433,7 +433,7 @@ intelDestroyBuffer(__DRIdrawable * driDrawPriv)
  * functions.
  */
 
-#define CHIPSET(id, name, info) { id, &intel_chipset_##info },
+#define CHIPSET(id, name, info, str) { id, &intel_chipset_##info },
 
 
 struct intel_chipset_map {
