From patchwork Fri Jun 24 19:42:50 2011 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ben Widawsky X-Patchwork-Id: 917582 Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by demeter1.kernel.org (8.14.4/8.14.4) with ESMTP id p5OJn2M2017606 for ; Fri, 24 Jun 2011 19:49:22 GMT Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 1F8539F0F2 for ; Fri, 24 Jun 2011 12:49:02 -0700 (PDT) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from cloud01.chad-versace.us (184-106-247-128.static.cloud-ips.com [184.106.247.128]) by gabe.freedesktop.org (Postfix) with ESMTP id 8BCEB9E81F; Fri, 24 Jun 2011 12:44:05 -0700 (PDT) Received: from localhost.localdomain (unknown [67.208.96.87]) by cloud01.chad-versace.us (Postfix) with ESMTPSA id 491711D4224; Fri, 24 Jun 2011 19:46:11 +0000 (UTC) From: Ben Widawsky To: intel-gfx@lists.freedesktop.org Date: Fri, 24 Jun 2011 12:42:50 -0700 Message-Id: <1308944576-12740-6-git-send-email-ben@bwidawsk.net> X-Mailer: git-send-email 1.7.5.2 In-Reply-To: <1308944576-12740-1-git-send-email-ben@bwidawsk.net> References: <1308944576-12740-1-git-send-email-ben@bwidawsk.net> Cc: mesa-dev@lists.freedesktop.org Subject: [Intel-gfx] [PATCH 05/11] i965: setup system routine X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.11 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: intel-gfx-bounces+patchwork-intel-gfx=patchwork.kernel.org@lists.freedesktop.org Errors-To: intel-gfx-bounces+patchwork-intel-gfx=patchwork.kernel.org@lists.freedesktop.org X-Greylist: IP, sender and recipient auto-whitelisted, not delayed by milter-greylist-4.2.6 (demeter1.kernel.org [140.211.167.41]); Fri, 24 Jun 2011 19:49:22 +0000 (UTC) Upload the system routine as part of the invariant state if debugging. Remove SIP setting if not debugging to make it more friendly for others that may be debugging shaders or media kernels. Signed-off-by: Ben Widawsky --- src/mesa/drivers/dri/i965/brw_misc_state.c | 24 +++++++++++------------- 1 files changed, 11 insertions(+), 13 deletions(-) diff --git a/src/mesa/drivers/dri/i965/brw_misc_state.c b/src/mesa/drivers/dri/i965/brw_misc_state.c index 1f3b64f..2465bc0 100644 --- a/src/mesa/drivers/dri/i965/brw_misc_state.c +++ b/src/mesa/drivers/dri/i965/brw_misc_state.c @@ -633,19 +633,17 @@ static void upload_invarient_state( struct brw_context *brw ) } } } - - /* 0x61020000 State Instruction Pointer */ - { - struct brw_system_instruction_pointer sip; - memset(&sip, 0, sizeof(sip)); - - sip.header.opcode = CMD_STATE_INSN_POINTER; - sip.header.length = 0; - sip.bits0.pad = 0; - sip.bits0.system_instruction_pointer = 0; - BRW_BATCH_STRUCT(brw, &sip); - } - + /* The system routine must be set after a change to Instruction base */ + if (brw->wm.debugging) { + assert(brw->wm.system_routine != NULL); + /* assert instruction base == 0 */ + BEGIN_BATCH(4); + OUT_BATCH(CMD_STATE_INSN_POINTER << 16); + OUT_RELOC(brw->wm.system_routine, I915_GEM_DOMAIN_RENDER, 0, 0); + OUT_BATCH(MI_FLUSH | 1 << 1); + OUT_BATCH(MI_NOOP); + ADVANCE_BATCH(); + } { struct brw_vf_statistics vfs;