| Message ID | 1309374991-3787-1-git-send-email-jbarnes@virtuousgeek.org (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
On Wed, 29 Jun 2011 12:16:31 -0700, Jesse Barnes <jbarnes@virtuousgeek.org> wrote: > They use the same register interfaces, so we can simply enable the > existing code on IVB. This doesn't apply cleanly to drm-intel-next
On Wed, 29 Jun 2011 13:28:58 -0700 Keith Packard <keithp@keithp.com> wrote: > On Wed, 29 Jun 2011 12:16:31 -0700, Jesse Barnes <jbarnes@virtuousgeek.org> wrote: > > > They use the same register interfaces, so we can simply enable the > > existing code on IVB. > > This doesn't apply cleanly to drm-intel-next v3 should apply to d-i-n; I had cherry picked to create one that would apply but must have messed up the hunks.
diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c index 8a5a032..ed62730 100644 --- a/drivers/gpu/drm/i915/i915_debugfs.c +++ b/drivers/gpu/drm/i915/i915_debugfs.c @@ -865,7 +865,7 @@ static int i915_cur_delayinfo(struct seq_file *m, void *unused) MEMSTAT_VID_SHIFT); seq_printf(m, "Current P-state: %d\n", (rgvstat & MEMSTAT_PSTATE_MASK) >> MEMSTAT_PSTATE_SHIFT); - } else if (IS_GEN6(dev)) { + } else if (IS_GEN6(dev) || IS_GEN7(dev)) { u32 gt_perf_status = I915_READ(GEN6_GT_PERF_STATUS); u32 rp_state_limits = I915_READ(GEN6_RP_STATE_LIMITS); u32 rp_state_cap = I915_READ(GEN6_RP_STATE_CAP); @@ -1131,7 +1131,7 @@ static int i915_ring_freq_table(struct seq_file *m, void *unused) int ret; int gpu_freq, ia_freq; - if (!IS_GEN6(dev)) { + if (!(IS_GEN6(dev) || IS_GEN7(dev))) { seq_printf(m, "unsupported on this chipset\n"); return 0; } diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c index 30dc105..c5cd042 100644 --- a/drivers/gpu/drm/i915/intel_display.c +++ b/drivers/gpu/drm/i915/intel_display.c @@ -7980,7 +7980,7 @@ void intel_modeset_init(struct drm_device *dev) intel_init_emon(dev); } - if (IS_GEN6(dev)) + if (IS_GEN6(dev) || IS_GEN7(dev)) { gen6_enable_rps(dev_priv); gen6_update_ring_freq(dev_priv); } @@ -8024,7 +8024,7 @@ void intel_modeset_cleanup(struct drm_device *dev) if (IS_IRONLAKE_M(dev)) ironlake_disable_drps(dev); - if (IS_GEN6(dev)) + if (IS_GEN6(dev) || IS_GEN7(dev)) gen6_disable_rps(dev); if (IS_IRONLAKE_M(dev))
They use the same register interfaces, so we can simply enable the existing code on IVB. v2: - resolve conflict with ring freq scaling, we can enable it too Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org> --- drivers/gpu/drm/i915/i915_debugfs.c | 4 ++-- drivers/gpu/drm/i915/intel_display.c | 4 ++-- 2 files changed, 4 insertions(+), 4 deletions(-)