From patchwork Wed Jul 13 20:51:45 2011 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ben Widawsky X-Patchwork-Id: 973302 Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by demeter2.kernel.org (8.14.4/8.14.4) with ESMTP id p6DKu0vF024909 for ; Wed, 13 Jul 2011 20:56:21 GMT Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 40D3DA0B4B for ; Wed, 13 Jul 2011 13:56:00 -0700 (PDT) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from cloud01.chad-versace.us (184-106-247-128.static.cloud-ips.com [184.106.247.128]) by gabe.freedesktop.org (Postfix) with ESMTP id B7B0BA0A7D; Wed, 13 Jul 2011 13:51:50 -0700 (PDT) Received: from localhost (localhost [127.0.0.1]) by cloud01.chad-versace.us (Postfix) with ESMTP id 7FCA81D42F0; Wed, 13 Jul 2011 20:54:16 +0000 (UTC) X-Virus-Scanned: amavisd-new at static.cloud-ips.com X-Spam-Flag: NO X-Spam-Score: -1 X-Spam-Level: X-Spam-Status: No, score=-1 tagged_above=-100 required=5 tests=[ALL_TRUSTED=-1] autolearn=ham Received: from cloud01.chad-versace.us ([127.0.0.1]) by localhost (cloud01.static.cloud-ips.com [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id qzqBhvrTELwI; Wed, 13 Jul 2011 20:54:08 +0000 (UTC) Received: from localhost.localdomain (jfdmzpr03-ext.jf.intel.com [134.134.139.72]) by cloud01.chad-versace.us (Postfix) with ESMTPSA id 3B4221D42F3; Wed, 13 Jul 2011 20:53:58 +0000 (UTC) From: Ben Widawsky To: intel-gfx@lists.freedesktop.org Date: Wed, 13 Jul 2011 13:51:45 -0700 Message-Id: <1310590312-21669-4-git-send-email-ben@bwidawsk.net> X-Mailer: git-send-email 1.7.6 In-Reply-To: <1310590312-21669-1-git-send-email-ben@bwidawsk.net> References: <1310590312-21669-1-git-send-email-ben@bwidawsk.net> Cc: mesa-dev@lists.freedesktop.org, Ben Widawsky Subject: [Intel-gfx] [PATCH 03/10] i965: Reserve scratch space for debugger communication X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.11 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: intel-gfx-bounces+patchwork-intel-gfx=patchwork.kernel.org@lists.freedesktop.org Errors-To: intel-gfx-bounces+patchwork-intel-gfx=patchwork.kernel.org@lists.freedesktop.org X-Greylist: IP, sender and recipient auto-whitelisted, not delayed by milter-greylist-4.2.6 (demeter2.kernel.org [140.211.167.43]); Wed, 13 Jul 2011 20:56:21 +0000 (UTC) Since the debug system routine will share scratch space with threads doing register spilling, we must offset the registers to accommodate. This is more easily accomplished (and less bug prone) in Mesa. The debugger will only work with the new fragment shader backend. Signed-off-by: Ben Widawsky --- src/mesa/drivers/dri/i965/brw_fs_emit.cpp | 15 +++++++++++++-- src/mesa/drivers/dri/i965/brw_wm_emit.c | 2 ++ 2 files changed, 15 insertions(+), 2 deletions(-) diff --git a/src/mesa/drivers/dri/i965/brw_fs_emit.cpp b/src/mesa/drivers/dri/i965/brw_fs_emit.cpp index 1d89b8f..2cd613a 100644 --- a/src/mesa/drivers/dri/i965/brw_fs_emit.cpp +++ b/src/mesa/drivers/dri/i965/brw_fs_emit.cpp @@ -455,6 +455,17 @@ fs_visitor::generate_discard(fs_inst *inst) } } +static GLuint +brw_get_scratch_offset(struct brw_context *brw, fs_inst *inst) +{ + /* Split buffer 50-50 */ + if (brw->wm.debugging) { + return inst->offset + (brw->wm.scratch_bo->size / brw->wm_max_threads) / 2; + } else { + return inst->offset; + } +} + void fs_visitor::generate_spill(fs_inst *inst, struct brw_reg src) { @@ -464,7 +475,7 @@ fs_visitor::generate_spill(fs_inst *inst, struct brw_reg src) retype(brw_message_reg(inst->base_mrf + 1), BRW_REGISTER_TYPE_UD), retype(src, BRW_REGISTER_TYPE_UD)); brw_oword_block_write_scratch(p, brw_message_reg(inst->base_mrf), 1, - inst->offset); + brw_get_scratch_offset(brw, inst)); } void @@ -486,7 +497,7 @@ fs_visitor::generate_unspill(fs_inst *inst, struct brw_reg dst) brw_MOV(p, brw_null_reg(), dst); brw_oword_block_read_scratch(p, dst, brw_message_reg(inst->base_mrf), 1, - inst->offset); + brw_get_scratch_offset(brw, inst)); if (intel->gen == 4 && !intel->is_g4x) { /* gen4 errata: destination from a send can't be used as a diff --git a/src/mesa/drivers/dri/i965/brw_wm_emit.c b/src/mesa/drivers/dri/i965/brw_wm_emit.c index f61757a..4ac94ee 100644 --- a/src/mesa/drivers/dri/i965/brw_wm_emit.c +++ b/src/mesa/drivers/dri/i965/brw_wm_emit.c @@ -1560,6 +1560,8 @@ static void emit_spill( struct brw_wm_compile *c, mov (1) r0.2<1>:d 0x00000080:d { Align1 NoMask } send (16) null.0<1>:uw m1 r0.0<8;8,1>:uw 0x053003ff:ud { Align1 } */ + if (p->brw->wm.debugging) + abort(); brw_oword_block_write_scratch(p, brw_message_reg(1), 2, slot); }