From patchwork Sun Jul 17 23:25:41 2011 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ben Widawsky X-Patchwork-Id: 984922 Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by demeter1.kernel.org (8.14.4/8.14.4) with ESMTP id p6HNSlLQ002433 for ; Sun, 17 Jul 2011 23:29:07 GMT Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 8ECD89E88F for ; Sun, 17 Jul 2011 16:28:47 -0700 (PDT) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from cloud01.chad-versace.us (184-106-247-128.static.cloud-ips.com [184.106.247.128]) by gabe.freedesktop.org (Postfix) with ESMTP id B0A9C9EB09; Sun, 17 Jul 2011 16:25:35 -0700 (PDT) Received: from localhost (localhost [127.0.0.1]) by cloud01.chad-versace.us (Postfix) with ESMTP id 6DBB11D4263; Sun, 17 Jul 2011 23:28:05 +0000 (UTC) X-Virus-Scanned: amavisd-new at static.cloud-ips.com X-Spam-Flag: NO X-Spam-Score: -1 X-Spam-Level: X-Spam-Status: No, score=-1 tagged_above=-100 required=5 tests=[ALL_TRUSTED=-1] autolearn=ham Received: from cloud01.chad-versace.us ([127.0.0.1]) by localhost (cloud01.static.cloud-ips.com [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id lNBcihdC-J1Z; Sun, 17 Jul 2011 23:28:00 +0000 (UTC) Received: from localhost.localdomain (pool-96-250-39-22.nycmny.fios.verizon.net [96.250.39.22]) by cloud01.chad-versace.us (Postfix) with ESMTPSA id 956F71D42EF; Sun, 17 Jul 2011 23:27:54 +0000 (UTC) From: Ben Widawsky To: intel-gfx@lists.freedesktop.org Date: Sun, 17 Jul 2011 16:25:41 -0700 Message-Id: <1310945148-6777-4-git-send-email-ben@bwidawsk.net> X-Mailer: git-send-email 1.7.6 In-Reply-To: <1310945148-6777-1-git-send-email-ben@bwidawsk.net> References: <1310945148-6777-1-git-send-email-ben@bwidawsk.net> Cc: mesa-dev@lists.freedesktop.org, Ben Widawsky Subject: [Intel-gfx] [PATCH 03/10] i965: Reserve scratch space for debugger communication X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.11 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: intel-gfx-bounces+patchwork-intel-gfx=patchwork.kernel.org@lists.freedesktop.org Errors-To: intel-gfx-bounces+patchwork-intel-gfx=patchwork.kernel.org@lists.freedesktop.org X-Greylist: IP, sender and recipient auto-whitelisted, not delayed by milter-greylist-4.2.6 (demeter1.kernel.org [140.211.167.41]); Sun, 17 Jul 2011 23:29:07 +0000 (UTC) Since the debug system routine will share scratch space with threads doing register spilling, we must offset the registers to accommodate. This is more easily accomplished (and less bug prone) in Mesa. The debugger will only work with the new fragment shader backend. Signed-off-by: Ben Widawsky --- src/mesa/drivers/dri/i965/brw_fs_emit.cpp | 15 +++++++++++++-- src/mesa/drivers/dri/i965/brw_wm_emit.c | 2 ++ 2 files changed, 15 insertions(+), 2 deletions(-) diff --git a/src/mesa/drivers/dri/i965/brw_fs_emit.cpp b/src/mesa/drivers/dri/i965/brw_fs_emit.cpp index 1d89b8f..2cd613a 100644 --- a/src/mesa/drivers/dri/i965/brw_fs_emit.cpp +++ b/src/mesa/drivers/dri/i965/brw_fs_emit.cpp @@ -455,6 +455,17 @@ fs_visitor::generate_discard(fs_inst *inst) } } +static GLuint +brw_get_scratch_offset(struct brw_context *brw, fs_inst *inst) +{ + /* Split buffer 50-50 */ + if (brw->wm.debugging) { + return inst->offset + (brw->wm.scratch_bo->size / brw->wm_max_threads) / 2; + } else { + return inst->offset; + } +} + void fs_visitor::generate_spill(fs_inst *inst, struct brw_reg src) { @@ -464,7 +475,7 @@ fs_visitor::generate_spill(fs_inst *inst, struct brw_reg src) retype(brw_message_reg(inst->base_mrf + 1), BRW_REGISTER_TYPE_UD), retype(src, BRW_REGISTER_TYPE_UD)); brw_oword_block_write_scratch(p, brw_message_reg(inst->base_mrf), 1, - inst->offset); + brw_get_scratch_offset(brw, inst)); } void @@ -486,7 +497,7 @@ fs_visitor::generate_unspill(fs_inst *inst, struct brw_reg dst) brw_MOV(p, brw_null_reg(), dst); brw_oword_block_read_scratch(p, dst, brw_message_reg(inst->base_mrf), 1, - inst->offset); + brw_get_scratch_offset(brw, inst)); if (intel->gen == 4 && !intel->is_g4x) { /* gen4 errata: destination from a send can't be used as a diff --git a/src/mesa/drivers/dri/i965/brw_wm_emit.c b/src/mesa/drivers/dri/i965/brw_wm_emit.c index f61757a..4ac94ee 100644 --- a/src/mesa/drivers/dri/i965/brw_wm_emit.c +++ b/src/mesa/drivers/dri/i965/brw_wm_emit.c @@ -1560,6 +1560,8 @@ static void emit_spill( struct brw_wm_compile *c, mov (1) r0.2<1>:d 0x00000080:d { Align1 NoMask } send (16) null.0<1>:uw m1 r0.0<8;8,1>:uw 0x053003ff:ud { Align1 } */ + if (p->brw->wm.debugging) + abort(); brw_oword_block_write_scratch(p, brw_message_reg(1), 2, slot); }