From patchwork Sun Sep 4 15:35:02 2011 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Daniel Vetter X-Patchwork-Id: 1124142 Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by demeter2.kernel.org (8.14.4/8.14.4) with ESMTP id p84Gavmw021876 for ; Sun, 4 Sep 2011 16:37:17 GMT Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 4A225A089B for ; Sun, 4 Sep 2011 09:36:57 -0700 (PDT) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mail-ew0-f49.google.com (mail-ew0-f49.google.com [209.85.215.49]) by gabe.freedesktop.org (Postfix) with ESMTP id C7B15A1AF0 for ; Sun, 4 Sep 2011 09:34:52 -0700 (PDT) Received: by ewy3 with SMTP id 3so2309231ewy.36 for ; Sun, 04 Sep 2011 09:34:51 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ffwll.ch; s=google; h=from:to:cc:subject:date:message-id:x-mailer:in-reply-to:references; bh=JuT4VBaPFjnq+DnBt1+bP6vSoHJgoysIIaQRfErOP9o=; b=TUwrrIoIGlQCggGHakcWUnCKMHsp4CK94DLoF40EMroQEY82hSxKtw8PBEvg4iBpdf 22Fwwpf3btBsFwd44VktKpcUStZE/iILXEbFfJEyTV0PXsLjU4ibSfGrNLaI3Pljgylz TBG9lSKHZ/jpo07U1zGdoMqfM5f1XDqjexl+c= Received: by 10.213.20.130 with SMTP id f2mr589082ebb.61.1315154091356; Sun, 04 Sep 2011 09:34:51 -0700 (PDT) Received: from localhost.localdomain (178-83-130-250.dynamic.hispeed.ch [178.83.130.250]) by mx.google.com with ESMTPS id q50sm6207272eef.9.2011.09.04.09.34.50 (version=TLSv1/SSLv3 cipher=OTHER); Sun, 04 Sep 2011 09:34:50 -0700 (PDT) From: Daniel Vetter To: intel-gfx@lists.freedesktop.org Date: Sun, 4 Sep 2011 17:35:02 +0200 Message-Id: <1315150502-12537-4-git-send-email-daniel.vetter@ffwll.ch> X-Mailer: git-send-email 1.7.6 In-Reply-To: <1315150502-12537-1-git-send-email-daniel.vetter@ffwll.ch> References: <20110904084953.16cd10a2@bwidawsk.net> <1315150502-12537-1-git-send-email-daniel.vetter@ffwll.ch> Cc: Daniel Vetter , Ben Widawsky Subject: [Intel-gfx] [PATCH 3/3] drm/i915: close rps work vs. rps disable races X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.11 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: intel-gfx-bounces+patchwork-intel-gfx=patchwork.kernel.org@lists.freedesktop.org Errors-To: intel-gfx-bounces+patchwork-intel-gfx=patchwork.kernel.org@lists.freedesktop.org X-Greylist: IP, sender and recipient auto-whitelisted, not delayed by milter-greylist-4.2.6 (demeter2.kernel.org [140.211.167.43]); Sun, 04 Sep 2011 16:37:17 +0000 (UTC) The rps disabling code wasn't properly cancelling outstanding work items. Also add a comment that explains why we're not racing with the work item, that could again unmask interrupts. This also fixes a bug on module unload because nothing was properly syncing up with that work item, possibly leading to it being run after freeing dev_priv or removing the module code. Signed-off-by: Daniel Vetter --- drivers/gpu/drm/i915/intel_display.c | 8 +++++++- 1 files changed, 7 insertions(+), 1 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c index 56a8554..ccd4600 100644 --- a/drivers/gpu/drm/i915/intel_display.c +++ b/drivers/gpu/drm/i915/intel_display.c @@ -7483,10 +7483,16 @@ void gen6_disable_rps(struct drm_device *dev) I915_WRITE(GEN6_RPNSWREQ, 1 << 31); I915_WRITE(GEN6_PMINTRMSK, 0xffffffff); - I915_WRITE(GEN6_PMIER, 0); + /* Complete PM interrupt masking here doesn't race with the rps work + * item again unmasking PM interrupts because that is using PMIMR + * (logically sitting atop of PMINTRMSK) to mask interrupts. */ + cancel_work_sync(&dev_priv->rps_work); + /* Clear PMIMR and dev_priv->pm_iir in case outstanding work gets + * cancelled before having run. */ spin_lock_irq(&dev_priv->rps_lock); dev_priv->pm_iir = 0; + I915_WRITE(GEN6_PMIER, 0); spin_unlock_irq(&dev_priv->rps_lock); I915_WRITE(GEN6_PMIIR, I915_READ(GEN6_PMIIR));