From patchwork Tue Jul 3 09:28:04 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Daniel Vetter X-Patchwork-Id: 1150211 Return-Path: X-Original-To: patchwork-intel-gfx@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork2.kernel.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by patchwork2.kernel.org (Postfix) with ESMTP id 74486DFF72 for ; Tue, 3 Jul 2012 10:44:25 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 6165BA01F9 for ; Tue, 3 Jul 2012 03:44:25 -0700 (PDT) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mail-wg0-f43.google.com (mail-wg0-f43.google.com [74.125.82.43]) by gabe.freedesktop.org (Postfix) with ESMTP id 2B4149F70B for ; Tue, 3 Jul 2012 03:34:41 -0700 (PDT) Received: by wgbdr1 with SMTP id dr1so4714410wgb.12 for ; Tue, 03 Jul 2012 03:34:40 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ffwll.ch; s=google; h=from:to:cc:subject:date:message-id:x-mailer:in-reply-to:references; bh=Ug/U/ZTs5+t4DallJ4KSf0tG5g68xt0jgB8NeMdjhQQ=; b=KXO5WsIelfBmysCiy0Z3632HxzO5VqPnwAbdz6sp22Zx9gdeU+IZ9UuuZzU1LkLkRC ysjudZqtuGhjTiaCbk4rzKm4CwsClzt3cExWNm4eoDGs+23FGkn5gXpSAlAGdDCS4cP0 uoUaWoQ1AbPt2OfsbHZGVsBbuTqAsYI7A5MPI= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20120113; h=from:to:cc:subject:date:message-id:x-mailer:in-reply-to:references :x-gm-message-state; bh=Ug/U/ZTs5+t4DallJ4KSf0tG5g68xt0jgB8NeMdjhQQ=; b=dGVCRdPuEnFYiFvWFcZsTcOjsj85czwUcRDWTcoIWLaIqSh7h/x050btTE9Igz73hJ DWivZSJCbxa6kSzySk2v1iP4l8Po0q+EAl9b9n6zy8unrTgFAD2kM9Vv0Ts7gmUpzm7Z C2/w6C8lMFk99a4CKm/iKqqPmna6PQZvJ8QMEHV6sZyKKSHc8+tQaWtktbAoL0Bp21fP y6bfYzngqLTxw/dcJM32cSjF9U4hTk3zIDZqegp//99smMURnf5RsZO5MkqnC62oUaUI nFkOW/GNUmp/XBYs6C0OejKU9Bdrbz5ltJB6xyU/mTdfXLhpa7tux2R1b9RpVhgiV/wM hk0A== Received: by 10.181.13.142 with SMTP id ey14mr24098058wid.19.1341311680232; Tue, 03 Jul 2012 03:34:40 -0700 (PDT) Received: from wespe.ffwll.local (178-83-130-250.dynamic.hispeed.ch. [178.83.130.250]) by mx.google.com with ESMTPS id e9sm14845138wiw.10.2012.07.03.03.34.38 (version=TLSv1/SSLv3 cipher=OTHER); Tue, 03 Jul 2012 03:34:39 -0700 (PDT) From: Daniel Vetter To: Intel Graphics Development Date: Tue, 3 Jul 2012 11:28:04 +0200 Message-Id: <1341307715-3886-13-git-send-email-daniel.vetter@ffwll.ch> X-Mailer: git-send-email 1.7.7.6 In-Reply-To: <1341307715-3886-1-git-send-email-daniel.vetter@ffwll.ch> References: <1341307715-3886-1-git-send-email-daniel.vetter@ffwll.ch> X-Gm-Message-State: ALoCoQklcgH0XHBCb10McxZtNku9RMqcLOqfEqFU4CDxRZJnEri42sgbzcpYMP6zQJbl/S5Jto1t Cc: Daniel Vetter Subject: [Intel-gfx] [PATCH 12/43] drm/i915/dp: convert to encoder disable/enable X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.13 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: intel-gfx-bounces+patchwork-intel-gfx=patchwork.kernel.org@lists.freedesktop.org Errors-To: intel-gfx-bounces+patchwork-intel-gfx=patchwork.kernel.org@lists.freedesktop.org DP is the first encoder which isn't simple. As commit d240f20f545fa4ed78ce48d1eb62ab529f2b1467 Author: Jesse Barnes Date: Fri Aug 13 15:43:26 2010 -0700 drm/i915: make sure eDP PLL is enabled at the right time discovered, we need to enable the eDP PLL for the cpu port _before_ we enable the pipes and planes. After a few more commits the current solution is to enable the PLL in the dp mode_set function (because this is the only encoder callback the crtc helper code calls before it calls the crtc's commit function). Now I suspect that we actually should enable/disable the entire cpu eDP port before/after planes, but thanks to how the crtc helper code assumes that you can disable an encoder without disabling it's crtc right away, this won't work. The result is that the current prepare/commit hooks don't touch the eDP PLL, but instead it get's frobbed in dp_mode_set and in the dp dpms function. Hence we need to keep things (at least for now) bug-for-bug compatible by using our own special dp dpms function and keep everything else more-or-less as-is (just using our own infrastrucutre now). This mess can only be cleaned once we control the entire modeset sequence and can move around things freely. v2: Squash unsupported dpms modes to OFF at the beginning of the DP dpms function. Signed-Off-by: Daniel Vetter --- drivers/gpu/drm/i915/intel_dp.c | 88 +++++++++++++++++++------------------- 1 files changed, 44 insertions(+), 44 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c index 096947d..b8abbff 100644 --- a/drivers/gpu/drm/i915/intel_dp.c +++ b/drivers/gpu/drm/i915/intel_dp.c @@ -1277,10 +1277,9 @@ static void intel_dp_sink_dpms(struct intel_dp *intel_dp, int mode) } } -static void intel_dp_prepare(struct drm_encoder *encoder) +static void intel_disable_dp(struct intel_encoder *encoder) { - struct intel_dp *intel_dp = enc_to_intel_dp(encoder); - + struct intel_dp *intel_dp = enc_to_intel_dp(&encoder->base); /* Make sure the panel is off before trying to change the mode. But also * ensure that we have vdd while we switch off the panel. */ @@ -1293,62 +1292,60 @@ static void intel_dp_prepare(struct drm_encoder *encoder) ironlake_edp_panel_vdd_off(intel_dp, false); } -static void intel_dp_commit(struct drm_encoder *encoder) +static void intel_enable_dp(struct intel_encoder *encoder) { - struct intel_dp *intel_dp = enc_to_intel_dp(encoder); - struct drm_device *dev = encoder->dev; - struct intel_crtc *intel_crtc = to_intel_crtc(intel_dp->base.base.crtc); + struct intel_dp *intel_dp = enc_to_intel_dp(&encoder->base); + struct drm_device *dev = encoder->base.dev; + struct drm_i915_private *dev_priv = dev->dev_private; + uint32_t dp_reg = I915_READ(intel_dp->output_reg); ironlake_edp_panel_vdd_on(intel_dp); intel_dp_sink_dpms(intel_dp, DRM_MODE_DPMS_ON); - intel_dp_start_link_train(intel_dp); - ironlake_edp_panel_on(intel_dp); - ironlake_edp_panel_vdd_off(intel_dp, true); - intel_dp_complete_link_train(intel_dp); + if (!(dp_reg & DP_PORT_EN)) { + intel_dp_start_link_train(intel_dp); + ironlake_edp_panel_on(intel_dp); + ironlake_edp_panel_vdd_off(intel_dp, true); + intel_dp_complete_link_train(intel_dp); + } else + ironlake_edp_panel_vdd_off(intel_dp, false); ironlake_edp_backlight_on(intel_dp); intel_dp->dpms_mode = DRM_MODE_DPMS_ON; - - if (HAS_PCH_CPT(dev)) - intel_cpt_verify_modeset(dev, intel_crtc->pipe); } static void -intel_dp_dpms(struct drm_encoder *encoder, int mode) +intel_dp_dpms(struct drm_connector *connector, int mode) { - struct intel_dp *intel_dp = enc_to_intel_dp(encoder); - struct drm_device *dev = encoder->dev; - struct drm_i915_private *dev_priv = dev->dev_private; - uint32_t dp_reg = I915_READ(intel_dp->output_reg); + struct intel_dp *intel_dp = intel_attached_dp(connector); - if (mode != DRM_MODE_DPMS_ON) { - /* Switching the panel off requires vdd. */ - ironlake_edp_panel_vdd_on(intel_dp); - ironlake_edp_backlight_off(intel_dp); - ironlake_edp_panel_off(intel_dp); + /* DP supports only 2 dpms states. */ + if (mode != DRM_MODE_DPMS_ON) + mode = DRM_MODE_DPMS_OFF; - intel_dp_sink_dpms(intel_dp, mode); - intel_dp_link_down(intel_dp); - ironlake_edp_panel_vdd_off(intel_dp, false); + if (mode == connector->dpms) + return; + + connector->dpms = mode; + + /* Only need to change hw state when actually enabled */ + if (!intel_dp->base.base.crtc) { + intel_dp->base.connectors_active = false; + return; + } + + if (mode != DRM_MODE_DPMS_ON) { + intel_encoder_dpms(&intel_dp->base, mode); + WARN_ON(intel_dp->dpms_mode != DRM_MODE_DPMS_OFF); if (is_cpu_edp(intel_dp)) - ironlake_edp_pll_off(encoder); + ironlake_edp_pll_off(&intel_dp->base.base); } else { if (is_cpu_edp(intel_dp)) - ironlake_edp_pll_on(encoder); + ironlake_edp_pll_on(&intel_dp->base.base); - ironlake_edp_panel_vdd_on(intel_dp); - intel_dp_sink_dpms(intel_dp, mode); - if (!(dp_reg & DP_PORT_EN)) { - intel_dp_start_link_train(intel_dp); - ironlake_edp_panel_on(intel_dp); - ironlake_edp_panel_vdd_off(intel_dp, true); - intel_dp_complete_link_train(intel_dp); - } else - ironlake_edp_panel_vdd_off(intel_dp, false); - ironlake_edp_backlight_on(intel_dp); + intel_encoder_dpms(&intel_dp->base, mode); + WARN_ON(intel_dp->dpms_mode != DRM_MODE_DPMS_ON); } - intel_dp->dpms_mode = mode; } /* @@ -2361,15 +2358,15 @@ static void intel_dp_encoder_destroy(struct drm_encoder *encoder) } static const struct drm_encoder_helper_funcs intel_dp_helper_funcs = { - .dpms = intel_dp_dpms, .mode_fixup = intel_dp_mode_fixup, - .prepare = intel_dp_prepare, + .prepare = intel_encoder_noop, .mode_set = intel_dp_mode_set, - .commit = intel_dp_commit, + .commit = intel_encoder_noop, + .disable = intel_encoder_disable, }; static const struct drm_connector_funcs intel_dp_connector_funcs = { - .dpms = drm_helper_connector_dpms, + .dpms = intel_dp_dpms, .detect = intel_dp_detect, .fill_modes = drm_helper_probe_single_connector_modes, .set_property = intel_dp_set_property, @@ -2507,6 +2504,9 @@ intel_dp_init(struct drm_device *dev, int output_reg) intel_connector_attach_encoder(intel_connector, intel_encoder); drm_sysfs_connector_add(connector); + intel_encoder->enable = intel_enable_dp; + intel_encoder->disable = intel_disable_dp; + /* Set up the DDC bus. */ switch (output_reg) { case DP_A: