From patchwork Tue Jul 3 09:28:07 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Daniel Vetter X-Patchwork-Id: 1150251 Return-Path: X-Original-To: patchwork-intel-gfx@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork1.kernel.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by patchwork1.kernel.org (Postfix) with ESMTP id B84853FE4F for ; Tue, 3 Jul 2012 10:46:39 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id A428FA01F9 for ; Tue, 3 Jul 2012 03:46:39 -0700 (PDT) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mail-wi0-f169.google.com (mail-wi0-f169.google.com [209.85.212.169]) by gabe.freedesktop.org (Postfix) with ESMTP id C95F49F77B for ; Tue, 3 Jul 2012 03:34:45 -0700 (PDT) Received: by wibhm2 with SMTP id hm2so3335751wib.0 for ; Tue, 03 Jul 2012 03:34:44 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ffwll.ch; s=google; h=from:to:cc:subject:date:message-id:x-mailer:in-reply-to:references; bh=s6u9jS1GSLIKwnvYk2gIqz8ZzSoLTddzQkZNiggBvoM=; b=GYKwC5BAWnI/ppb4jI702ldfew3j1VrfRW3UYxVcBUdBnVgnAau06SocYIo6LXzrQ3 yFrbG2oauw1asfMefbZB/EoZziMIzXKQ1n2+9XN47UISBSKf/Rl72/RuQawsqFmMHAdU Zqo7UME7OhkEayqwcSWvP28hg4zNDXUSPbOFw= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20120113; h=from:to:cc:subject:date:message-id:x-mailer:in-reply-to:references :x-gm-message-state; bh=s6u9jS1GSLIKwnvYk2gIqz8ZzSoLTddzQkZNiggBvoM=; b=AFSXTT3og8/VDrsZbIR4sZNzsb7yAhc0O8ubyOMw9/1vqDXq8kvJOfai5FXe4YYPXm evGpusjfOOEkhGew8JeLagHjR/4B7wk2d69KgjEGxDDgYwSnBOTjkwe4bZ1y/nO2zc17 UO/czQYD4DG1nKqpNWwgd7E8dKxbmRLr7A8Ui54jmTDNxs6WQb6MPMg0k7nlkb1c9hD1 O0T4m0qwUyEtuidYff5tLzaQRT415FCzYjyKMdDIao2QHVYJTEhm0hdQUKQ1G6nBQ1Rg OoHOuiLklCrfy9/dhiwy7PNEqQdkBf36d1PY2LneDA9GIX6OlwSgi5ZGDq/sxOKbgQ/Q 4hVg== Received: by 10.180.105.6 with SMTP id gi6mr30808968wib.4.1341311684382; Tue, 03 Jul 2012 03:34:44 -0700 (PDT) Received: from wespe.ffwll.local (178-83-130-250.dynamic.hispeed.ch. [178.83.130.250]) by mx.google.com with ESMTPS id e9sm14845138wiw.10.2012.07.03.03.34.43 (version=TLSv1/SSLv3 cipher=OTHER); Tue, 03 Jul 2012 03:34:43 -0700 (PDT) From: Daniel Vetter To: Intel Graphics Development Date: Tue, 3 Jul 2012 11:28:07 +0200 Message-Id: <1341307715-3886-16-git-send-email-daniel.vetter@ffwll.ch> X-Mailer: git-send-email 1.7.7.6 In-Reply-To: <1341307715-3886-1-git-send-email-daniel.vetter@ffwll.ch> References: <1341307715-3886-1-git-send-email-daniel.vetter@ffwll.ch> X-Gm-Message-State: ALoCoQlWx1s3AEZAUPtWBWosCZVYqg0llAp82L7IMWHmP02iLmz5+XXhUtCM2Nu90hc8ycigG40u Cc: Daniel Vetter Subject: [Intel-gfx] [PATCH 15/43] drm/i915: add inte_crt->adpa_reg X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.13 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: intel-gfx-bounces+patchwork-intel-gfx=patchwork.kernel.org@lists.freedesktop.org Errors-To: intel-gfx-bounces+patchwork-intel-gfx=patchwork.kernel.org@lists.freedesktop.org With the base addresses shifting around, this is easier to handle. Also move to the real reg offset on vlv. Signed-off-by: Daniel Vetter --- drivers/gpu/drm/i915/i915_reg.h | 1 + drivers/gpu/drm/i915/intel_crt.c | 23 ++++++++++++++++------- 2 files changed, 17 insertions(+), 7 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h index 052d470..3b9c65e 100644 --- a/drivers/gpu/drm/i915/i915_reg.h +++ b/drivers/gpu/drm/i915/i915_reg.h @@ -1543,6 +1543,7 @@ /* VGA port control */ #define ADPA 0x61100 #define PCH_ADPA 0xe1100 +#define VLV_ADPA (VLV_DISPLAY_BASE + ADPA) #define ADPA_DAC_ENABLE (1<<31) #define ADPA_DAC_DISABLE 0 diff --git a/drivers/gpu/drm/i915/intel_crt.c b/drivers/gpu/drm/i915/intel_crt.c index 61d55d3..8babc10 100644 --- a/drivers/gpu/drm/i915/intel_crt.c +++ b/drivers/gpu/drm/i915/intel_crt.c @@ -47,6 +47,7 @@ struct intel_crt { struct intel_encoder base; bool force_hotplug_required; + u32 adpa_reg; }; static struct intel_crt *intel_attached_crt(struct drm_connector *connector) @@ -55,6 +56,11 @@ static struct intel_crt *intel_attached_crt(struct drm_connector *connector) struct intel_crt, base); } +static struct intel_crt *intel_encoder_to_crt(struct intel_encoder *encoder) +{ + return container_of(encoder, struct intel_crt, base); +} + static void pch_crt_dpms(struct drm_encoder *encoder, int mode) { struct drm_device *dev = encoder->dev; @@ -145,19 +151,15 @@ static void intel_crt_mode_set(struct drm_encoder *encoder, struct drm_device *dev = encoder->dev; struct drm_crtc *crtc = encoder->crtc; + struct intel_crt *crt = + intel_encoder_to_crt(to_intel_encoder(encoder)); struct intel_crtc *intel_crtc = to_intel_crtc(crtc); struct drm_i915_private *dev_priv = dev->dev_private; int dpll_md_reg; u32 adpa, dpll_md; - u32 adpa_reg; dpll_md_reg = DPLL_MD(intel_crtc->pipe); - if (HAS_PCH_SPLIT(dev)) - adpa_reg = PCH_ADPA; - else - adpa_reg = ADPA; - /* * Disable separate mode multiplier used when cloning SDVO to CRT * XXX this needs to be adjusted when we really are cloning @@ -185,7 +187,7 @@ static void intel_crt_mode_set(struct drm_encoder *encoder, if (!HAS_PCH_SPLIT(dev)) I915_WRITE(BCLRPAT(intel_crtc->pipe), 0); - I915_WRITE(adpa_reg, adpa); + I915_WRITE(crt->adpa_reg, adpa); } static bool intel_ironlake_crt_detect_hotplug(struct drm_connector *connector) @@ -682,6 +684,13 @@ void intel_crt_init(struct drm_device *dev) else encoder_helper_funcs = &gmch_encoder_funcs; + if (HAS_PCH_SPLIT(dev)) + crt->adpa_reg = PCH_ADPA; + else if (IS_VALLEYVIEW(dev)) + crt->adpa_reg = VLV_ADPA; + else + crt->adpa_reg = ADPA; + drm_encoder_helper_add(&crt->base.base, encoder_helper_funcs); drm_connector_helper_add(connector, &intel_crt_connector_helper_funcs);