From patchwork Tue Jul 3 09:28:32 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Daniel Vetter X-Patchwork-Id: 1150501 Return-Path: X-Original-To: patchwork-intel-gfx@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork2.kernel.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by patchwork2.kernel.org (Postfix) with ESMTP id 2DE66DFF72 for ; Tue, 3 Jul 2012 11:05:45 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 08FC39F4D6 for ; Tue, 3 Jul 2012 04:05:45 -0700 (PDT) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mail-we0-f177.google.com (mail-we0-f177.google.com [74.125.82.177]) by gabe.freedesktop.org (Postfix) with ESMTP id 159859F504 for ; Tue, 3 Jul 2012 03:35:18 -0700 (PDT) Received: by mail-we0-f177.google.com with SMTP id b13so1638092wer.36 for ; Tue, 03 Jul 2012 03:35:18 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ffwll.ch; s=google; h=from:to:cc:subject:date:message-id:x-mailer:in-reply-to:references; bh=LV6EPI9iVrmzxBs7f2KcNxmbDxYn2IAX+eKpWXMq2xA=; b=AW9ATuKhZadAsHZRTERYKCWeb83R/WT7W5jjKdk6VOhwDtjNIfiAspgIWEVZp8PbZZ IExVIiyVX8eKy1zJJESv/k78djQR07ktvKavpoKiSTolJegH/ag4BCU7sO7BF5FcL6cg 156+CKbQCVdt9WwwpYPkCmFc5bzWQEHFsI1PE= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20120113; h=from:to:cc:subject:date:message-id:x-mailer:in-reply-to:references :x-gm-message-state; bh=LV6EPI9iVrmzxBs7f2KcNxmbDxYn2IAX+eKpWXMq2xA=; b=G8fJXCSFlFNaSJJAfIfwq08lennwCo6DGPfse6eLCEEhkas9uQmf4metEUywiSOcb0 gIw6nwB9nVkfG5jGltjb1B1p6+mQs+GSWIsVg/QJ1C+nxO2rhTNqUZkKidLhhCH5AagO /y4gNnRvRolH1lTzTmF2AMR+OV4pkwtp8Na3e39pDVRskjopz5NjXN1HyIzQHzsA1oI2 lXOv3IsbfgrY1i9P4ZcK9YgmGgFA/Xq7IQRZor+1qLDdhMG9XD8h/oTN84iDMavCBeLw ukBTi65nYg/jOeio9nMFO7pCdmE1EqsQ9jme+S4xFYUJaZz3ouRD9M4O8xthEJVBNvIt CRag== Received: by 10.216.196.218 with SMTP id r68mr3316160wen.122.1341311718687; Tue, 03 Jul 2012 03:35:18 -0700 (PDT) Received: from wespe.ffwll.local (178-83-130-250.dynamic.hispeed.ch. [178.83.130.250]) by mx.google.com with ESMTPS id e9sm14845138wiw.10.2012.07.03.03.35.17 (version=TLSv1/SSLv3 cipher=OTHER); Tue, 03 Jul 2012 03:35:18 -0700 (PDT) From: Daniel Vetter To: Intel Graphics Development Date: Tue, 3 Jul 2012 11:28:32 +0200 Message-Id: <1341307715-3886-41-git-send-email-daniel.vetter@ffwll.ch> X-Mailer: git-send-email 1.7.7.6 In-Reply-To: <1341307715-3886-1-git-send-email-daniel.vetter@ffwll.ch> References: <1341307715-3886-1-git-send-email-daniel.vetter@ffwll.ch> X-Gm-Message-State: ALoCoQlYNZqTBuh32tti5d6igKsnyrsOq9b4xnJZnBe3+NRCHzkvoxoMgtkQ9/Oihg5JM0aNSY5P Cc: Daniel Vetter Subject: [Intel-gfx] [PATCH 40/43] drm/i915/sdvo: implement get_hw_state X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.13 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: intel-gfx-bounces+patchwork-intel-gfx=patchwork.kernel.org@lists.freedesktop.org Errors-To: intel-gfx-bounces+patchwork-intel-gfx=patchwork.kernel.org@lists.freedesktop.org SDVO is the first real special case - we support multiple outputs on the same encoder and the encoder dpms state isn't the same as when just disabling the outputs when the encoder is cloned. Hence we need a real connector get_hw_state function which inquires the sdvo encoder about its active outputs. Signed-Off-by: Daniel Vetter --- drivers/gpu/drm/i915/intel_sdvo.c | 46 +++++++++++++++++++++++++++++++++++++ 1 files changed, 46 insertions(+), 0 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_sdvo.c b/drivers/gpu/drm/i915/intel_sdvo.c index 92763d5..65b52a1 100644 --- a/drivers/gpu/drm/i915/intel_sdvo.c +++ b/drivers/gpu/drm/i915/intel_sdvo.c @@ -625,6 +625,14 @@ static bool intel_sdvo_set_active_outputs(struct intel_sdvo *intel_sdvo, &outputs, sizeof(outputs)); } +static bool intel_sdvo_get_active_outputs(struct intel_sdvo *intel_sdvo, + u16 *outputs) +{ + return intel_sdvo_get_value(intel_sdvo, + SDVO_CMD_GET_ACTIVE_OUTPUTS, + outputs, sizeof(*outputs)); +} + static bool intel_sdvo_set_encoder_power_state(struct intel_sdvo *intel_sdvo, int mode) { @@ -1139,6 +1147,42 @@ static void intel_sdvo_mode_set(struct drm_encoder *encoder, intel_sdvo_write_sdvox(intel_sdvo, sdvox); } +static bool intel_sdvo_connector_get_hw_state(struct intel_connector *connector) +{ + struct intel_sdvo_connector *intel_sdvo_connector = + to_intel_sdvo_connector(&connector->base); + struct intel_sdvo *intel_sdvo = intel_attached_sdvo(&connector->base); + u16 active_outputs; + + intel_sdvo_get_active_outputs(intel_sdvo, &active_outputs); + + if (active_outputs & intel_sdvo_connector->output_flag) + return true; + else + return false; +} + +static bool intel_sdvo_get_hw_state(struct intel_encoder *encoder, + enum pipe *pipe) +{ + struct drm_device *dev = encoder->base.dev; + struct drm_i915_private *dev_priv = dev->dev_private; + struct intel_sdvo *intel_sdvo = to_intel_sdvo(&encoder->base); + u32 tmp; + + tmp = I915_READ(intel_sdvo->sdvo_reg); + + if (!(tmp & SDVO_ENABLE)) + return false; + + if (HAS_PCH_CPT(dev)) + *pipe = PORT_TO_PIPE_CPT(tmp); + else + *pipe = PORT_TO_PIPE(tmp); + + return true; +} + static void intel_disable_sdvo(struct intel_encoder *encoder) { struct drm_i915_private *dev_priv = encoder->base.dev->dev_private; @@ -2063,6 +2107,7 @@ intel_sdvo_connector_init(struct intel_sdvo_connector *connector, connector->base.base.interlace_allowed = 1; connector->base.base.doublescan_allowed = 0; connector->base.base.display_info.subpixel_order = SubPixelHorizontalRGB; + connector->base.get_hw_state = intel_sdvo_connector_get_hw_state; intel_connector_attach_encoder(&connector->base, &encoder->base); drm_sysfs_connector_add(&connector->base.base); @@ -2616,6 +2661,7 @@ bool intel_sdvo_init(struct drm_device *dev, uint32_t sdvo_reg, bool is_sdvob) intel_encoder->disable = intel_disable_sdvo; intel_encoder->enable = intel_enable_sdvo; + intel_encoder->get_hw_state = intel_sdvo_get_hw_state; /* In default case sdvo lvds is false */ if (!intel_sdvo_get_capabilities(intel_sdvo, &intel_sdvo->caps))