From patchwork Tue Jul 3 21:16:42 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?St=C3=A9phane_Marchesin?= X-Patchwork-Id: 1153121 Return-Path: X-Original-To: patchwork-intel-gfx@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork1.kernel.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by patchwork1.kernel.org (Postfix) with ESMTP id 519923FE4F for ; Tue, 3 Jul 2012 21:17:30 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 250E4A08E4 for ; Tue, 3 Jul 2012 14:17:30 -0700 (PDT) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mail-yw0-f49.google.com (mail-yw0-f49.google.com [209.85.213.49]) by gabe.freedesktop.org (Postfix) with ESMTP id 48B7F9E7FE for ; Tue, 3 Jul 2012 14:17:00 -0700 (PDT) Received: by yhjj52 with SMTP id j52so7878711yhj.36 for ; Tue, 03 Jul 2012 14:16:59 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=chromium.org; s=google; h=from:to:cc:subject:date:message-id:x-mailer:mime-version :content-type:content-transfer-encoding; bh=zS1OiDYPEF8p4+fzBqfcWZbmOt2F3EAw1t7P/lnJZ7U=; b=gG75+zb2FPb9meK1dI/w2lpWDh16dqPxT1Co5ftEEpaOEtQxnVIiWOvB66PW2dcO1E 7Kng9ClfMuylNWAzlKMdvohIKCpOB8GghGHjyf46vvtl8xVgUHbpDxTnkKcoucA/cGCn F51L2/ZlHRkItV+ZH879cVTApNlhJU9IrbXmc= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20120113; h=from:to:cc:subject:date:message-id:x-mailer:mime-version :content-type:content-transfer-encoding:x-gm-message-state; bh=zS1OiDYPEF8p4+fzBqfcWZbmOt2F3EAw1t7P/lnJZ7U=; b=H8IxlYVkL4EdgvylAv34pGiqKAwHRin0ZA2jykYzzUGlDFKhNu3zoXmGUEnhtqrRD/ AA30hgnSXOzrId6Xh8RIfaKDFNiD3lHr28iiqparVd2/rC7JcEWTUup6/T7fkRjhc0QT +AxMvIpDYUPx+n1MuB217hBT1L8W7Rag+tfwDlSLbWAo4HP7nmf22b1bRGtUdZkLUS1j TQ27Uan5e7rHCmjRDebW305lqwQ/RRDOj4uNuHktQL+KUGXW1WPJBciYTp3MWvmpO+9+ 5lctsbyXjFB82Y+h2XtDEGusRA3yYSSp9bhu2ZdytdCm8U3Ig0NVMxMKR9gCrcy7MAqv f31g== Received: by 10.68.194.6 with SMTP id hs6mr11087017pbc.133.1341350211564; Tue, 03 Jul 2012 14:16:51 -0700 (PDT) Received: from localhost ([2620:0:1000:1b01:d685:64ff:feb2:fd1f]) by mx.google.com with ESMTPS id rs4sm16256320pbc.0.2012.07.03.14.16.49 (version=TLSv1/SSLv3 cipher=OTHER); Tue, 03 Jul 2012 14:16:50 -0700 (PDT) From: =?UTF-8?q?St=C3=A9phane=20Marchesin?= To: intel-gfx@lists.freedesktop.org Date: Tue, 3 Jul 2012 14:16:42 -0700 Message-Id: <1341350202-8664-1-git-send-email-marcheu@chromium.org> X-Mailer: git-send-email 1.7.5.3.367.ga9930 MIME-Version: 1.0 X-Gm-Message-State: ALoCoQmfMjGGFCkyy8beFOb6Jedz+SM+sBEm3DsHLzqP3pRJikyRQrOTwQPe3drENiJtCsQWgIXn Subject: [Intel-gfx] [PATCH] drm/i915: Ajdust down threshold in intel_pm. X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.13 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: intel-gfx-bounces+patchwork-intel-gfx=patchwork.kernel.org@lists.freedesktop.org Errors-To: intel-gfx-bounces+patchwork-intel-gfx=patchwork.kernel.org@lists.freedesktop.org The up and down thresholds are very asymetric, so it is possible to have a case where a spike of rendering increases the GPU clock to the max (because the up threshold is low) and then a simple blinking cursor is enough to keep the clock at the maximum speed forever (because the down threshold is high). Lowering the down threshold allows the GPU clock to go back down even when there is a blinking cursor on the screen. Signed-off-by: Stéphane Marchesin --- drivers/gpu/drm/i915/intel_pm.c | 2 +- 1 files changed, 1 insertions(+), 1 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c index d0ce2a5..eba882a 100644 --- a/drivers/gpu/drm/i915/intel_pm.c +++ b/drivers/gpu/drm/i915/intel_pm.c @@ -2432,7 +2432,7 @@ void gen6_enable_rps(struct drm_i915_private *dev_priv) dev_priv->max_delay << 24 | dev_priv->min_delay << 16); I915_WRITE(GEN6_RP_UP_THRESHOLD, 10000); - I915_WRITE(GEN6_RP_DOWN_THRESHOLD, 1000000); + I915_WRITE(GEN6_RP_DOWN_THRESHOLD, 100000); I915_WRITE(GEN6_RP_UP_EI, 100000); I915_WRITE(GEN6_RP_DOWN_EI, 5000000); I915_WRITE(GEN6_RP_IDLE_HYSTERSIS, 10);