From patchwork Thu Jul 26 11:55:49 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Daniel Vetter X-Patchwork-Id: 1242061 Return-Path: X-Original-To: patchwork-intel-gfx@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork1.kernel.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by patchwork1.kernel.org (Postfix) with ESMTP id DB5B53FC5A for ; Thu, 26 Jul 2012 11:56:20 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id AF8BF9F0DE for ; Thu, 26 Jul 2012 04:56:20 -0700 (PDT) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mail-bk0-f49.google.com (mail-bk0-f49.google.com [209.85.214.49]) by gabe.freedesktop.org (Postfix) with ESMTP id D45C39F02F for ; Thu, 26 Jul 2012 04:55:45 -0700 (PDT) Received: by bkcji2 with SMTP id ji2so1226420bkc.36 for ; Thu, 26 Jul 2012 04:55:45 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ffwll.ch; s=google; h=from:to:cc:subject:date:message-id:x-mailer:in-reply-to:references; bh=ZMGNBUjOSt5yIekTTxbfZTnlCBTu7MIgGLNUvrjsK/M=; b=OBmuxkkPPU2C8HgQ76/y96Np/F28tjG+CPKC1W20m2aeUqsunAZTXWVENlkG55vwQh RLQpcmwGt++JJOmgFHv8R5X4zG5qNkjqDXWwqGCTX2pm+cAnVXgqL59xDlEs33NdbfO2 YcIIMUcx+EUL0apuPANcgUDwOJxrsWjf70YPc= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20120113; h=from:to:cc:subject:date:message-id:x-mailer:in-reply-to:references :x-gm-message-state; bh=ZMGNBUjOSt5yIekTTxbfZTnlCBTu7MIgGLNUvrjsK/M=; b=GU76AQzC002jr1VZGSTEWshk7LB5e+AIqCscndxU6IaZGepRO1x1ORk/pKQfHcoP++ ZnbunerXR6zIGcJtOT4qE5ca/c8PAdNF7PYg1Ksac5MlZReToZbMfmKtpUoXwBKRGP/l RB/U6F05wyNQ7UsxxhjI46w1zCnKsmSi6jedFcXEcSnKt82+Rob+R2YIYWgtrjRDa5oK OrXJdomd8H5o5QHD03f4IKgNXuC1PIaN74MnCRIewO2FLzPGGSGl7BbH7amolNaHKG4o jhZk0dxY/+FlPH1+ikrM+2mQb/m+eqQtszAOtJ7MWSdwLsupdFt8U5CR9fd9rw4R0L+d vWgQ== Received: by 10.204.152.145 with SMTP id g17mr13514711bkw.120.1343303744757; Thu, 26 Jul 2012 04:55:44 -0700 (PDT) Received: from phenom.ffwll.local (178-83-130-250.dynamic.hispeed.ch. [178.83.130.250]) by mx.google.com with ESMTPS id n5sm14426125bkv.14.2012.07.26.04.55.42 (version=TLSv1/SSLv3 cipher=OTHER); Thu, 26 Jul 2012 04:55:43 -0700 (PDT) From: Daniel Vetter To: Intel Graphics Development , Carsten Emde Date: Thu, 26 Jul 2012 13:55:49 +0200 Message-Id: <1343303749-30184-1-git-send-email-daniel.vetter@ffwll.ch> X-Mailer: git-send-email 1.7.10.4 In-Reply-To: <501074AA.1070905@osadl.org> References: <501074AA.1070905@osadl.org> X-Gm-Message-State: ALoCoQmXaIEWc94hjyOh46i0oWannGqQ7px45Tlk3RBMbjDwpyne6kyP22OHLOkv/D211dT/rR+N Cc: Daniel Vetter Subject: [Intel-gfx] [PATCH] drm/i915 disable combination mode X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.13 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: intel-gfx-bounces+patchwork-intel-gfx=patchwork.kernel.org@lists.freedesktop.org Errors-To: intel-gfx-bounces+patchwork-intel-gfx=patchwork.kernel.org@lists.freedesktop.org ... but this time around don't forget to save/restore the lbpc reg. --- Hi Carsten, Please test this quick hack, afaict that should be more towards the ultimate truth of gen4 backlight heaven than adding random invert brightness quirks. Yours, Daniel --- drivers/gpu/drm/i915/i915_drv.h | 1 + drivers/gpu/drm/i915/i915_reg.h | 3 +++ drivers/gpu/drm/i915/i915_suspend.c | 10 ++++++++++ drivers/gpu/drm/i915/intel_panel.c | 4 ++-- 4 files changed, 16 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h index 0b2eb17..f483ef4 100644 --- a/drivers/gpu/drm/i915/i915_drv.h +++ b/drivers/gpu/drm/i915/i915_drv.h @@ -507,6 +507,7 @@ typedef struct drm_i915_private { /* Register state */ bool modeset_on_lid; u8 saveLBB; + u8 saveLBPC; u32 saveDSPACNTR; u32 saveDSPBCNTR; u32 saveDSPARB; diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h index 1310caa..29ccd22 100644 --- a/drivers/gpu/drm/i915/i915_reg.h +++ b/drivers/gpu/drm/i915/i915_reg.h @@ -1882,6 +1882,9 @@ #define PFIT_AUTO_RATIOS 0x61238 +/* legacy/combination backlight modes in the pci config space */ +#define PCI_LBPC 0xf4 + /* Backlight control */ #define BLC_PWM_CTL2 0x61250 /* 965+ only */ #define BLM_PWM_ENABLE (1 << 31) diff --git a/drivers/gpu/drm/i915/i915_suspend.c b/drivers/gpu/drm/i915/i915_suspend.c index 740c076..63f9c09 100644 --- a/drivers/gpu/drm/i915/i915_suspend.c +++ b/drivers/gpu/drm/i915/i915_suspend.c @@ -641,6 +641,11 @@ static void i915_save_display(struct drm_device *dev) dev_priv->saveLVDS = I915_READ(LVDS); } + if (IS_GEN2(dev) || IS_GEN4(dev)) { + pci_read_config_byte(dev->pdev, PCI_LBPC, + &dev_priv->saveLBPC); + } + if (!IS_I830(dev) && !IS_845G(dev) && !HAS_PCH_SPLIT(dev)) dev_priv->savePFIT_CONTROL = I915_READ(PFIT_CONTROL); @@ -758,6 +763,11 @@ static void i915_restore_display(struct drm_device *dev) I915_WRITE(PP_CONTROL, dev_priv->savePP_CONTROL); } + if (IS_GEN2(dev) || IS_GEN4(dev)) { + pci_read_config_byte(dev->pdev, PCI_LBPC, + &dev_priv->saveLBPC); + } + /* Display Port state */ if (SUPPORTS_INTEGRATED_DP(dev)) { I915_WRITE(DP_B, dev_priv->saveDP_B); diff --git a/drivers/gpu/drm/i915/intel_panel.c b/drivers/gpu/drm/i915/intel_panel.c index 10c7d39..c8b6bc5 100644 --- a/drivers/gpu/drm/i915/intel_panel.c +++ b/drivers/gpu/drm/i915/intel_panel.c @@ -33,8 +33,6 @@ #include #include "intel_drv.h" -#define PCI_LBPC 0xf4 /* legacy/combination backlight modes */ - void intel_fixed_panel_mode(struct drm_display_mode *fixed_mode, struct drm_display_mode *adjusted_mode) @@ -121,11 +119,13 @@ static int is_backlight_combination_mode(struct drm_device *dev) { struct drm_i915_private *dev_priv = dev->dev_private; +#if 0 if (INTEL_INFO(dev)->gen >= 4) return I915_READ(BLC_PWM_CTL2) & BLM_COMBINATION_MODE; if (IS_GEN2(dev)) return I915_READ(BLC_PWM_CTL) & BLM_LEGACY_MODE; +#endif return 0; }