From patchwork Thu Jul 26 18:48:54 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Daniel Vetter X-Patchwork-Id: 1244971 Return-Path: X-Original-To: patchwork-intel-gfx@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork1.kernel.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by patchwork1.kernel.org (Postfix) with ESMTP id 45AD43FC33 for ; Thu, 26 Jul 2012 20:23:03 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 0DCAA9EEC2 for ; Thu, 26 Jul 2012 13:23:03 -0700 (PDT) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mail-wg0-f43.google.com (mail-wg0-f43.google.com [74.125.82.43]) by gabe.freedesktop.org (Postfix) with ESMTP id 533AF9EC4F for ; Thu, 26 Jul 2012 12:56:47 -0700 (PDT) Received: by mail-wg0-f43.google.com with SMTP id dr1so1724773wgb.12 for ; Thu, 26 Jul 2012 12:56:47 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ffwll.ch; s=google; h=from:to:cc:subject:date:message-id:x-mailer:in-reply-to:references; bh=gku2VZBuhwxf6riq8dBHB0L3asHOOYGuvP4vADWajUE=; b=OJgN+rLF+agQe7SEl3+YhcPDPSVwL4mU1YBncRBNZVnz+z93x8lab6nax1pGQ420o6 7Kqs5/MmHuau2AX7bnOqQfT7x7Ja3fHXtVGRxMyMp3xX2z2zxuwShSMFe1FNYHAqvFor AbD8dMlBfrtDjlE750BmGvf4u3ciWbCrmTDM8= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20120113; h=from:to:cc:subject:date:message-id:x-mailer:in-reply-to:references :x-gm-message-state; bh=gku2VZBuhwxf6riq8dBHB0L3asHOOYGuvP4vADWajUE=; b=YGAYhluMDEpq6X5oLSI7mj7EstHd3/4F0qm6cpXCzUdwhEuiTK5avu02rHKvCZUe1k iTsYZVS+pAMc9Ao+yhj9KWhe/+RBcxBUveSg9jIrvFUnaMBvVQYxEGFtBy/SjoGmB0H2 +xETVS/YkIXbqw8F7U5dauqghwysYY6YZrs6SBlsHEOWS+d4QZkMh4bIC2RGCsb8mv2O 8TwrA9gaUA4KWxXHKmnbXRYj+J/DvzkqrUF5LSXX88KYFZ/p2ICD4T2fDPN460Xame2W IG24GbnOdfQGWMdebs+LEXOLrYJxCXpr3nqkeLvZj414EK17Os/VsTKPH4yautAfOoIa SHjA== Received: by 10.180.100.133 with SMTP id ey5mr172905wib.4.1343332607024; Thu, 26 Jul 2012 12:56:47 -0700 (PDT) Received: from wespe.ffwll.local (178-83-130-250.dynamic.hispeed.ch. [178.83.130.250]) by mx.google.com with ESMTPS id fr4sm391403wib.8.2012.07.26.12.56.44 (version=TLSv1/SSLv3 cipher=OTHER); Thu, 26 Jul 2012 12:56:46 -0700 (PDT) From: Daniel Vetter To: Intel Graphics Development Date: Thu, 26 Jul 2012 20:48:54 +0200 Message-Id: <1343328581-2324-30-git-send-email-daniel.vetter@ffwll.ch> X-Mailer: git-send-email 1.7.10.4 In-Reply-To: <1343328581-2324-1-git-send-email-daniel.vetter@ffwll.ch> References: <1343328581-2324-1-git-send-email-daniel.vetter@ffwll.ch> X-Gm-Message-State: ALoCoQmCjHpuUMJcRMd0RSKkVvjWuMSt2Ot5zI9Po7kXUiGIGCkgFhedlCP9RX19EUT3d2PKB/Sm Cc: Daniel Vetter Subject: [Intel-gfx] [PATCH 29/76] drm/i915: WARN when trying to enabled an unused crtc X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.13 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: intel-gfx-bounces+patchwork-intel-gfx=patchwork.kernel.org@lists.freedesktop.org Errors-To: intel-gfx-bounces+patchwork-intel-gfx=patchwork.kernel.org@lists.freedesktop.org This is the first tiny step towards cross-checking the entire modeset state machine with WARNs. A crtc can only be enabled when it's actually in use, i.e. crtc->active imlies crtc->enabled. Unfortunately we can't (yet) check this when disabling the crtc, because the crtc helpers are a bit slopy with updating state and unconditionally update crtc->enabled before changing the hw state. Fixing that requires quite some more work. Signed-Off-by: Daniel Vetter --- drivers/gpu/drm/i915/intel_display.c | 4 ++++ drivers/gpu/drm/i915/intel_drv.h | 10 +++++++++- 2 files changed, 13 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c index 177795a..428e0ed 100644 --- a/drivers/gpu/drm/i915/intel_display.c +++ b/drivers/gpu/drm/i915/intel_display.c @@ -3214,6 +3214,8 @@ static void ironlake_crtc_enable(struct drm_crtc *crtc) u32 temp; bool is_pch_port; + WARN_ON(!crtc->enabled); + /* XXX: For compatability with the crtc helper code, call the encoder's * enable function unconditionally for now. */ if (intel_crtc->active) @@ -3390,6 +3392,8 @@ static void i9xx_crtc_enable(struct drm_crtc *crtc) int pipe = intel_crtc->pipe; int plane = intel_crtc->plane; + WARN_ON(!crtc->enabled); + /* XXX: For compatability with the crtc helper code, call the encoder's * enable function unconditionally for now. */ if (intel_crtc->active) diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h index 4145a1d..0f2a42e 100644 --- a/drivers/gpu/drm/i915/intel_drv.h +++ b/drivers/gpu/drm/i915/intel_drv.h @@ -157,7 +157,15 @@ struct intel_crtc { enum plane plane; u8 lut_r[256], lut_g[256], lut_b[256]; int dpms_mode; - bool active; /* is the crtc on? independent of the dpms mode */ + /* + * Whether the crtc and the connected output pipeline is active. Implies + * that crtc->enabled is set, i.e. the current mode configuration has + * some outputs connected to this crtc. + * + * Atm crtc->enabled is unconditionally updated _before_ the hw state is + * changed, hence we can only check this when enabling the crtc. + */ + bool active; bool primary_disabled; /* is the crtc obscured by a plane? */ bool lowfreq_avail; struct intel_overlay *overlay;