From patchwork Thu Jul 26 18:49:05 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Daniel Vetter X-Patchwork-Id: 1245081 Return-Path: X-Original-To: patchwork-intel-gfx@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork2.kernel.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by patchwork2.kernel.org (Postfix) with ESMTP id C9345DFFCE for ; Thu, 26 Jul 2012 20:32:05 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 53EDA9E9D9 for ; Thu, 26 Jul 2012 13:32:05 -0700 (PDT) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mail-wi0-f177.google.com (mail-wi0-f177.google.com [209.85.212.177]) by gabe.freedesktop.org (Postfix) with ESMTP id 973029E737 for ; Thu, 26 Jul 2012 12:57:02 -0700 (PDT) Received: by mail-wi0-f177.google.com with SMTP id hm11so1801934wib.12 for ; Thu, 26 Jul 2012 12:57:02 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ffwll.ch; s=google; h=from:to:cc:subject:date:message-id:x-mailer:in-reply-to:references; bh=rWh1+unSjQ3uhfZ1ZTWTwII+MU1z1HCrCa12B7CLA10=; b=KA6y3F+U4Wd7qX07y8zCh+ENYSM1ROwJxGz1TXcuiPEADEATHHoHTjWIlZSUSOLZJx ciwDOo3X8YebhVRCxlNDjZ6g1UjKsJ2MyjukvbExyTkZ+3NuybFsf+Z9xyWeEEUuKSY7 QnllALU1QuKbdep3hmSQv3SB1l8hOddQtRjls= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20120113; h=from:to:cc:subject:date:message-id:x-mailer:in-reply-to:references :x-gm-message-state; bh=rWh1+unSjQ3uhfZ1ZTWTwII+MU1z1HCrCa12B7CLA10=; b=fQgLV0sUp7xFNyO65qICtbqzNHZKcnVIca/md8YVCxmzp3OomgXrJh4KiMalMQJy7S XA7el4g6Rp6uwmM60hR7JnU0Toy/i187PW/fraDfGeOD/fO9TcLkRT/QoB0RCuBwg25d nPY/IGQbC5OLBNjeR1tSercDE58GxA9DivuO3UvAvyrDOWgt2snAyNJZBnoryceFt5WU rhWdPDAmWTUrqtlsiTMQpuhPvrZXbm3xSHnBL/7Sl0HEZBbPlHbxR3pEdJQRy/eseETS i9xs1ibQDLwXwU8Bc8o/pa4lKfTG9u57Vb/dnIDf9J6SWQCuWK+XCw5/fFnnlXc3dBAI PG7w== Received: by 10.216.137.193 with SMTP id y43mr8738wei.71.1343332622237; Thu, 26 Jul 2012 12:57:02 -0700 (PDT) Received: from wespe.ffwll.local (178-83-130-250.dynamic.hispeed.ch. [178.83.130.250]) by mx.google.com with ESMTPS id fr4sm391403wib.8.2012.07.26.12.57.00 (version=TLSv1/SSLv3 cipher=OTHER); Thu, 26 Jul 2012 12:57:01 -0700 (PDT) From: Daniel Vetter To: Intel Graphics Development Date: Thu, 26 Jul 2012 20:49:05 +0200 Message-Id: <1343328581-2324-41-git-send-email-daniel.vetter@ffwll.ch> X-Mailer: git-send-email 1.7.10.4 In-Reply-To: <1343328581-2324-1-git-send-email-daniel.vetter@ffwll.ch> References: <1343328581-2324-1-git-send-email-daniel.vetter@ffwll.ch> X-Gm-Message-State: ALoCoQmEDE3sJglBtj0NUkwaMnqA5C7D7z00Pztm8JjVt0j4v5nKtj6U96ZjbA2C10rDJSmqIIMZ Cc: Daniel Vetter Subject: [Intel-gfx] [PATCH 40/76] drm/i915: rip out intel_crtc->dpms_mode X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.13 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: intel-gfx-bounces+patchwork-intel-gfx=patchwork.kernel.org@lists.freedesktop.org Errors-To: intel-gfx-bounces+patchwork-intel-gfx=patchwork.kernel.org@lists.freedesktop.org Afaict this has been used for two things: - To prevent the crtc enable code from being run twice. We have now intel_crtc->active to track this in a more precise way. - To ensure the code copes correctly with the unknown hw state after boot and resume. Thanks to the hw state readout and sanitize code we have now a better way to handle this. The only thing it still does is complicate our modeset state space. Having outlived its usefullness, let it just die. Signed-Off-by: Daniel Vetter --- drivers/gpu/drm/i915/intel_display.c | 17 ----------------- drivers/gpu/drm/i915/intel_drv.h | 1 - 2 files changed, 18 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c index b3c4151..4375e6d 100644 --- a/drivers/gpu/drm/i915/intel_display.c +++ b/drivers/gpu/drm/i915/intel_display.c @@ -3469,18 +3469,10 @@ void intel_crtc_update_dpms(struct drm_crtc *crtc) struct intel_encoder *intel_encoder; int pipe = intel_crtc->pipe; bool enabled, enable = false; - int mode; for_each_encoder_on_crtc(dev, crtc, intel_encoder) enable |= intel_encoder->connectors_active; - mode = enable ? DRM_MODE_DPMS_ON : DRM_MODE_DPMS_OFF; - - if (intel_crtc->dpms_mode == mode) - return; - - intel_crtc->dpms_mode = mode; - if (enable) dev_priv->display.crtc_enable(crtc); else @@ -5047,11 +5039,6 @@ static int intel_crtc_mode_set(struct drm_crtc *crtc, x, y, old_fb); drm_vblank_post_modeset(dev, pipe); - if (ret) - intel_crtc->dpms_mode = DRM_MODE_DPMS_OFF; - else - intel_crtc->dpms_mode = DRM_MODE_DPMS_ON; - return ret; } @@ -7565,10 +7552,6 @@ static void intel_sanitize_crtc(struct intel_crtc *crtc) struct drm_i915_private *dev_priv = dev->dev_private; u32 reg, val; - /* Clear the dpms state for compatibility with code still using that - * deprecated state variable. */ - crtc->dpms_mode = -1; - /* Clear any frame start delays used for debugging left by the BIOS */ reg = PIPECONF(crtc->pipe); I915_WRITE(reg, I915_READ(reg) & ~PIPECONF_FRAME_START_DELAY_MASK); diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h index 220be82..63c643a 100644 --- a/drivers/gpu/drm/i915/intel_drv.h +++ b/drivers/gpu/drm/i915/intel_drv.h @@ -163,7 +163,6 @@ struct intel_crtc { enum pipe pipe; enum plane plane; u8 lut_r[256], lut_g[256], lut_b[256]; - int dpms_mode; /* * Whether the crtc and the connected output pipeline is active. Implies * that crtc->enabled is set, i.e. the current mode configuration has