From patchwork Thu Jul 26 18:48:33 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Daniel Vetter X-Patchwork-Id: 1244671 Return-Path: X-Original-To: patchwork-intel-gfx@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork2.kernel.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by patchwork2.kernel.org (Postfix) with ESMTP id 618AEDFFCE for ; Thu, 26 Jul 2012 20:06:19 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 301D19F5AF for ; Thu, 26 Jul 2012 13:06:19 -0700 (PDT) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mail-wi0-f171.google.com (mail-wi0-f171.google.com [209.85.212.171]) by gabe.freedesktop.org (Postfix) with ESMTP id B04DD9EB84 for ; Thu, 26 Jul 2012 12:56:16 -0700 (PDT) Received: by wibhq4 with SMTP id hq4so5480612wib.12 for ; Thu, 26 Jul 2012 12:56:15 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ffwll.ch; s=google; h=from:to:cc:subject:date:message-id:x-mailer:in-reply-to:references; bh=PoZsTILj+WVSDTGBbMt3zRhuAeUnaIk4Qt8F5+iY3Pg=; b=gRttnosd2q34a2Vjz9wxczjTx0TgLHMyEu2N0fUbufvWi47kbK2KbPlorLMY1tG2pL ujgBhCXryahK/q2cEduzbfNQgMZS2KHjs16ddh85qvHx+uvHMp1uVx23gGQDWUP0VKMx 6QdQZfDor0pasXyWX7xs9B840d2UDh4yhX3f0= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20120113; h=from:to:cc:subject:date:message-id:x-mailer:in-reply-to:references :x-gm-message-state; bh=PoZsTILj+WVSDTGBbMt3zRhuAeUnaIk4Qt8F5+iY3Pg=; b=GJ8R1NyOAa95ETvT50pefiaXtXDctxMdpOU1Q7G8UC9xvnU9ETDKaFhwXxwOgsyPQ3 ytV4vsoEz+3bqro202W1W7mXQsclm9+G/THw9w1G8Kp3med4fhpLXKRvwa9uiXLrDOBN 0dvAy9Ou++9O2Raa6z3g/Qzf0ow11GwP52CIqgCt+0HKu6ADD/BGjn1VL1bZHF1gDRj8 MEP0B4CPGm0w5G6kIxTDesTP1xJtBK/MC7dBaY67mjqG4KWe7k9bZq8YKBLy8odB00CD VwmjeooT1AUR4oTcXoUfUr/xHnvLMHUhD7viogrYTf8LV2TluTabdcU6ToECS5Unbb9B EwOQ== Received: by 10.180.89.235 with SMTP id br11mr176569wib.3.1343332575880; Thu, 26 Jul 2012 12:56:15 -0700 (PDT) Received: from wespe.ffwll.local (178-83-130-250.dynamic.hispeed.ch. [178.83.130.250]) by mx.google.com with ESMTPS id fr4sm391403wib.8.2012.07.26.12.56.14 (version=TLSv1/SSLv3 cipher=OTHER); Thu, 26 Jul 2012 12:56:15 -0700 (PDT) From: Daniel Vetter To: Intel Graphics Development Date: Thu, 26 Jul 2012 20:48:33 +0200 Message-Id: <1343328581-2324-9-git-send-email-daniel.vetter@ffwll.ch> X-Mailer: git-send-email 1.7.10.4 In-Reply-To: <1343328581-2324-1-git-send-email-daniel.vetter@ffwll.ch> References: <1343328581-2324-1-git-send-email-daniel.vetter@ffwll.ch> X-Gm-Message-State: ALoCoQkMBpoZGOEV8/VmbjQJCu7L5UVgq+XdR2BnBhg41NIKtDS4K9QdKiAjs2XUVnyg3FgW2h3O Cc: Daniel Vetter Subject: [Intel-gfx] [PATCH 08/76] drm/i915: extract ironlake_fdi_pll_disable X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.13 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: intel-gfx-bounces+patchwork-intel-gfx=patchwork.kernel.org@lists.freedesktop.org Errors-To: intel-gfx-bounces+patchwork-intel-gfx=patchwork.kernel.org@lists.freedesktop.org Simply to make the ilk+ crtc disable path clearer and more symmetric with the enable function. Also switch to intel_crtc for the enable function. Signed-Off-by: Daniel Vetter Reviewed-by: Jesse Barnes --- drivers/gpu/drm/i915/intel_display.c | 57 ++++++++++++++++++++-------------- 1 file changed, 33 insertions(+), 24 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c index 7224055..1d5a811 100644 --- a/drivers/gpu/drm/i915/intel_display.c +++ b/drivers/gpu/drm/i915/intel_display.c @@ -2708,11 +2708,10 @@ static void ivb_manual_fdi_link_train(struct drm_crtc *crtc) DRM_DEBUG_KMS("FDI train done.\n"); } -static void ironlake_fdi_pll_enable(struct drm_crtc *crtc) +static void ironlake_fdi_pll_enable(struct intel_crtc *intel_crtc) { - struct drm_device *dev = crtc->dev; + struct drm_device *dev = intel_crtc->base.dev; struct drm_i915_private *dev_priv = dev->dev_private; - struct intel_crtc *intel_crtc = to_intel_crtc(crtc); int pipe = intel_crtc->pipe; u32 reg, temp; @@ -2753,6 +2752,35 @@ static void ironlake_fdi_pll_enable(struct drm_crtc *crtc) } } +static void ironlake_fdi_pll_disable(struct intel_crtc *intel_crtc) +{ + struct drm_device *dev = intel_crtc->base.dev; + struct drm_i915_private *dev_priv = dev->dev_private; + int pipe = intel_crtc->pipe; + u32 reg, temp; + + /* Switch from PCDclk to Rawclk */ + reg = FDI_RX_CTL(pipe); + temp = I915_READ(reg); + I915_WRITE(reg, temp & ~FDI_PCDCLK); + + /* Disable CPU FDI TX PLL */ + reg = FDI_TX_CTL(pipe); + temp = I915_READ(reg); + I915_WRITE(reg, temp & ~FDI_TX_PLL_ENABLE); + + POSTING_READ(reg); + udelay(100); + + reg = FDI_RX_CTL(pipe); + temp = I915_READ(reg); + I915_WRITE(reg, temp & ~FDI_RX_PLL_ENABLE); + + /* Wait for the clocks to turn off. */ + POSTING_READ(reg); + udelay(100); +} + static void cpt_phase_pointer_disable(struct drm_device *dev, int pipe) { struct drm_i915_private *dev_priv = dev->dev_private; @@ -3200,7 +3228,7 @@ static void ironlake_crtc_enable(struct drm_crtc *crtc) is_pch_port = intel_crtc_driving_pch(crtc); if (is_pch_port) - ironlake_fdi_pll_enable(crtc); + ironlake_fdi_pll_enable(intel_crtc); else ironlake_fdi_disable(crtc); @@ -3303,26 +3331,7 @@ static void ironlake_crtc_disable(struct drm_crtc *crtc) /* disable PCH DPLL */ intel_disable_pch_pll(intel_crtc); - /* Switch from PCDclk to Rawclk */ - reg = FDI_RX_CTL(pipe); - temp = I915_READ(reg); - I915_WRITE(reg, temp & ~FDI_PCDCLK); - - /* Disable CPU FDI TX PLL */ - reg = FDI_TX_CTL(pipe); - temp = I915_READ(reg); - I915_WRITE(reg, temp & ~FDI_TX_PLL_ENABLE); - - POSTING_READ(reg); - udelay(100); - - reg = FDI_RX_CTL(pipe); - temp = I915_READ(reg); - I915_WRITE(reg, temp & ~FDI_RX_PLL_ENABLE); - - /* Wait for the clocks to turn off. */ - POSTING_READ(reg); - udelay(100); + ironlake_fdi_pll_disable(intel_crtc); intel_crtc->active = false; intel_update_watermarks(dev);