From patchwork Sun Aug 19 19:12:45 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Daniel Vetter X-Patchwork-Id: 1345011 Return-Path: X-Original-To: patchwork-intel-gfx@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork2.kernel.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by patchwork2.kernel.org (Postfix) with ESMTP id F35A3DF264 for ; Sun, 19 Aug 2012 20:39:36 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id D5C90A104D for ; Sun, 19 Aug 2012 13:39:36 -0700 (PDT) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mail-wg0-f43.google.com (mail-wg0-f43.google.com [74.125.82.43]) by gabe.freedesktop.org (Postfix) with ESMTP id C4F4DA1024 for ; Sun, 19 Aug 2012 13:20:51 -0700 (PDT) Received: by mail-wg0-f43.google.com with SMTP id dr1so4210645wgb.12 for ; Sun, 19 Aug 2012 13:20:51 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ffwll.ch; s=google; h=from:to:cc:subject:date:message-id:x-mailer:in-reply-to:references; bh=VgPcE9IV1mv1V1/WpvBEw1XMvIxxzXeGZyYDXBemMz8=; b=VznoJolDcIBi3MOtdcztI462pItYiD9/NMSpf7MlYTTXh0FVTq2iA9LLWslHIjHCo1 T6fGedTJV1zDKT4jBtG9tZYva+ay2stnuH/whzDwsUWRSisyJIFQ5gp546jzfD0MqQJw B/2KQbp4gPjwWqVgQTUnS1R+L3eiYGtSOiwGI= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20120113; h=from:to:cc:subject:date:message-id:x-mailer:in-reply-to:references :x-gm-message-state; bh=VgPcE9IV1mv1V1/WpvBEw1XMvIxxzXeGZyYDXBemMz8=; b=WJTGMQBuvTlZMzEy95rt1RRtFbyzcd+je9XhtI6F7QITwleM7c9J8+B0OHBgYbTn2u GOTzW8ik46AIS1frQGGDFHof+7zxRthOsA7wUKpCVvZfBCQ7xZCqGVWvIxLlxY+EGmn6 NtgKF+A0/KyUZwjpRDC/ROG8Yb75WCWtklARO3gZKFvm2UW0OP97/BckjfMQjUFnbIed F2yp63n/wRtYvRCmNSrQrQdmU5IwQd7SK3xVicz9mjLd7f1HEL4l5ILcsKlds+4VJr58 WA6cFtPf4FfJQyFF2tdW2ZgfkSn8ZP8jc5C7dlg9K+NgTyKkNaC+e+SDdxvRIXT891aS p89w== Received: by 10.180.86.106 with SMTP id o10mr22850163wiz.22.1345407651466; Sun, 19 Aug 2012 13:20:51 -0700 (PDT) Received: from wespe.ffwll.local (178-83-130-250.dynamic.hispeed.ch. [178.83.130.250]) by mx.google.com with ESMTPS id fu8sm24194367wib.5.2012.08.19.13.20.50 (version=TLSv1/SSLv3 cipher=OTHER); Sun, 19 Aug 2012 13:20:50 -0700 (PDT) From: Daniel Vetter To: Intel Graphics Development Date: Sun, 19 Aug 2012 21:12:45 +0200 Message-Id: <1345403595-9678-29-git-send-email-daniel.vetter@ffwll.ch> X-Mailer: git-send-email 1.7.11.2 In-Reply-To: <1345403595-9678-1-git-send-email-daniel.vetter@ffwll.ch> References: <1345403595-9678-1-git-send-email-daniel.vetter@ffwll.ch> X-Gm-Message-State: ALoCoQkn90IB4yj9blUD/lcuoDTAJrLkLT2GC8ki4xHdI+04as740HjGkzlXS5PLuK1mjp+OFwLm Cc: Daniel Vetter Subject: [Intel-gfx] [PATCH 28/58] drm/i915/sdvo: implement get_hw_state X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.13 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: intel-gfx-bounces+patchwork-intel-gfx=patchwork.kernel.org@lists.freedesktop.org Errors-To: intel-gfx-bounces+patchwork-intel-gfx=patchwork.kernel.org@lists.freedesktop.org SDVO is the first real special case - we support multiple outputs on the same encoder and the encoder dpms state isn't the same as when just disabling the outputs when the encoder is cloned. Hence we need a real connector get_hw_state function which inquires the sdvo encoder about its active outputs. Signed-Off-by: Daniel Vetter Reviewed-by: Jesse Barnes --- drivers/gpu/drm/i915/intel_sdvo.c | 46 +++++++++++++++++++++++++++++++++++++++ 1 file changed, 46 insertions(+) diff --git a/drivers/gpu/drm/i915/intel_sdvo.c b/drivers/gpu/drm/i915/intel_sdvo.c index 8cdc674..4a735a5 100644 --- a/drivers/gpu/drm/i915/intel_sdvo.c +++ b/drivers/gpu/drm/i915/intel_sdvo.c @@ -628,6 +628,14 @@ static bool intel_sdvo_set_active_outputs(struct intel_sdvo *intel_sdvo, &outputs, sizeof(outputs)); } +static bool intel_sdvo_get_active_outputs(struct intel_sdvo *intel_sdvo, + u16 *outputs) +{ + return intel_sdvo_get_value(intel_sdvo, + SDVO_CMD_GET_ACTIVE_OUTPUTS, + outputs, sizeof(*outputs)); +} + static bool intel_sdvo_set_encoder_power_state(struct intel_sdvo *intel_sdvo, int mode) { @@ -1142,6 +1150,42 @@ static void intel_sdvo_mode_set(struct drm_encoder *encoder, intel_sdvo_write_sdvox(intel_sdvo, sdvox); } +static bool intel_sdvo_connector_get_hw_state(struct intel_connector *connector) +{ + struct intel_sdvo_connector *intel_sdvo_connector = + to_intel_sdvo_connector(&connector->base); + struct intel_sdvo *intel_sdvo = intel_attached_sdvo(&connector->base); + u16 active_outputs; + + intel_sdvo_get_active_outputs(intel_sdvo, &active_outputs); + + if (active_outputs & intel_sdvo_connector->output_flag) + return true; + else + return false; +} + +static bool intel_sdvo_get_hw_state(struct intel_encoder *encoder, + enum pipe *pipe) +{ + struct drm_device *dev = encoder->base.dev; + struct drm_i915_private *dev_priv = dev->dev_private; + struct intel_sdvo *intel_sdvo = to_intel_sdvo(&encoder->base); + u32 tmp; + + tmp = I915_READ(intel_sdvo->sdvo_reg); + + if (!(tmp & SDVO_ENABLE)) + return false; + + if (HAS_PCH_CPT(dev)) + *pipe = PORT_TO_PIPE_CPT(tmp); + else + *pipe = PORT_TO_PIPE(tmp); + + return true; +} + static void intel_disable_sdvo(struct intel_encoder *encoder) { struct drm_i915_private *dev_priv = encoder->base.dev->dev_private; @@ -2066,6 +2110,7 @@ intel_sdvo_connector_init(struct intel_sdvo_connector *connector, connector->base.base.interlace_allowed = 1; connector->base.base.doublescan_allowed = 0; connector->base.base.display_info.subpixel_order = SubPixelHorizontalRGB; + connector->base.get_hw_state = intel_sdvo_connector_get_hw_state; intel_connector_attach_encoder(&connector->base, &encoder->base); drm_sysfs_connector_add(&connector->base.base); @@ -2619,6 +2664,7 @@ bool intel_sdvo_init(struct drm_device *dev, uint32_t sdvo_reg, bool is_sdvob) intel_encoder->disable = intel_disable_sdvo; intel_encoder->enable = intel_enable_sdvo; + intel_encoder->get_hw_state = intel_sdvo_get_hw_state; /* In default case sdvo lvds is false */ if (!intel_sdvo_get_capabilities(intel_sdvo, &intel_sdvo->caps))