| Message ID | 1345403595-9678-30-git-send-email-daniel.vetter@ffwll.ch (mailing list archive) |
|---|---|
| State | Accepted |
| Headers | show |
On Sun, 19 Aug 2012 21:12:46 +0200 Daniel Vetter <daniel.vetter@ffwll.ch> wrote: > Similar to the sdvo code we poke the dvo encoder whether the output is > active. Safe that dvo encoders are not standardized, so this requires > a new callback into the dvo chip driver. > > Hence implement that for all 6 dvo drivers. > > v2: With the newly added ns2501 we now have 6 dvo drivers instead of > just 5 ... > > Signed-Off-by: Daniel Vetter <daniel.vetter@ffwll.ch> > --- > drivers/gpu/drm/i915/dvo.h | 6 ++++++ > drivers/gpu/drm/i915/dvo_ch7017.c | 13 +++++++++++++ > drivers/gpu/drm/i915/dvo_ch7xxx.c | 13 +++++++++++++ > drivers/gpu/drm/i915/dvo_ivch.c | 15 +++++++++++++++ > drivers/gpu/drm/i915/dvo_ns2501.c | 15 +++++++++++++++ > drivers/gpu/drm/i915/dvo_sil164.c | 16 ++++++++++++++++ > drivers/gpu/drm/i915/dvo_tfp410.c | 14 ++++++++++++++ > drivers/gpu/drm/i915/intel_dvo.c | 27 +++++++++++++++++++++++++++ > 8 files changed, 119 insertions(+) > > diff --git a/drivers/gpu/drm/i915/dvo.h b/drivers/gpu/drm/i915/dvo.h > index 0fa839e..74b5efc 100644 > --- a/drivers/gpu/drm/i915/dvo.h > +++ b/drivers/gpu/drm/i915/dvo.h > @@ -114,6 +114,12 @@ struct intel_dvo_dev_ops { > */ > enum drm_connector_status (*detect)(struct intel_dvo_device *dvo); > > + /* > + * Probe the current hw status, returning true if the connected output > + * is active. > + */ > + bool (*get_hw_state)(struct intel_dvo_device *dev); > + > /** > * Query the device for the modes it provides. > * > diff --git a/drivers/gpu/drm/i915/dvo_ch7017.c b/drivers/gpu/drm/i915/dvo_ch7017.c > index 71e7650..86b27d1 100644 > --- a/drivers/gpu/drm/i915/dvo_ch7017.c > +++ b/drivers/gpu/drm/i915/dvo_ch7017.c > @@ -359,6 +359,18 @@ static void ch7017_dpms(struct intel_dvo_device *dvo, bool enable) > msleep(20); > } > > +static bool ch7017_get_hw_state(struct intel_dvo_device *dvo) > +{ > + uint8_t val; > + > + ch7017_read(dvo, CH7017_LVDS_POWER_DOWN, &val); > + > + if (val & CH7017_LVDS_POWER_DOWN_EN) > + return false; > + else > + return true; > +} > + > static void ch7017_dump_regs(struct intel_dvo_device *dvo) > { > uint8_t val; > @@ -396,6 +408,7 @@ struct intel_dvo_dev_ops ch7017_ops = { > .mode_valid = ch7017_mode_valid, > .mode_set = ch7017_mode_set, > .dpms = ch7017_dpms, > + .get_hw_state = ch7017_get_hw_state, > .dump_regs = ch7017_dump_regs, > .destroy = ch7017_destroy, > }; > diff --git a/drivers/gpu/drm/i915/dvo_ch7xxx.c b/drivers/gpu/drm/i915/dvo_ch7xxx.c > index c1dea5b..38f3a6c 100644 > --- a/drivers/gpu/drm/i915/dvo_ch7xxx.c > +++ b/drivers/gpu/drm/i915/dvo_ch7xxx.c > @@ -297,6 +297,18 @@ static void ch7xxx_dpms(struct intel_dvo_device *dvo, bool enable) > ch7xxx_writeb(dvo, CH7xxx_PM, CH7xxx_PM_FPD); > } > > +static bool ch7xxx_get_hw_state(struct intel_dvo_device *dvo) > +{ > + u8 val; > + > + ch7xxx_readb(dvo, CH7xxx_PM, &val); > + > + if (val & CH7xxx_PM_FPD) > + return false; > + else > + return true; > +} > + > static void ch7xxx_dump_regs(struct intel_dvo_device *dvo) > { > int i; > @@ -326,6 +338,7 @@ struct intel_dvo_dev_ops ch7xxx_ops = { > .mode_valid = ch7xxx_mode_valid, > .mode_set = ch7xxx_mode_set, > .dpms = ch7xxx_dpms, > + .get_hw_state = ch7xxx_get_hw_state, > .dump_regs = ch7xxx_dump_regs, > .destroy = ch7xxx_destroy, > }; > diff --git a/drivers/gpu/drm/i915/dvo_ivch.c b/drivers/gpu/drm/i915/dvo_ivch.c > index fa8ff6b..baaf65b 100644 > --- a/drivers/gpu/drm/i915/dvo_ivch.c > +++ b/drivers/gpu/drm/i915/dvo_ivch.c > @@ -323,6 +323,20 @@ static void ivch_dpms(struct intel_dvo_device *dvo, bool enable) > udelay(16 * 1000); > } > > +static bool ivch_get_hw_state(struct intel_dvo_device *dvo) > +{ > + uint16_t vr01; > + > + /* Set the new power state of the panel. */ > + if (!ivch_read(dvo, VR01, &vr01)) > + return false; > + > + if (vr01 & VR01_LCD_ENABLE) > + return true; > + else > + return false; > +} > + > static void ivch_mode_set(struct intel_dvo_device *dvo, > struct drm_display_mode *mode, > struct drm_display_mode *adjusted_mode) > @@ -413,6 +427,7 @@ static void ivch_destroy(struct intel_dvo_device *dvo) > struct intel_dvo_dev_ops ivch_ops = { > .init = ivch_init, > .dpms = ivch_dpms, > + .get_hw_state = ivch_get_hw_state, > .mode_valid = ivch_mode_valid, > .mode_set = ivch_mode_set, > .detect = ivch_detect, > diff --git a/drivers/gpu/drm/i915/dvo_ns2501.c b/drivers/gpu/drm/i915/dvo_ns2501.c > index c4d9f2f..c4a255b 100644 > --- a/drivers/gpu/drm/i915/dvo_ns2501.c > +++ b/drivers/gpu/drm/i915/dvo_ns2501.c > @@ -493,6 +493,20 @@ static void ns2501_mode_set(struct intel_dvo_device *dvo, > } > > /* set the NS2501 power state */ > +static bool ns2501_get_hw_state(struct intel_dvo_device *dvo) > +{ > + unsigned char ch; > + > + if (!ns2501_readb(dvo, NS2501_REG8, &ch)) > + return false; > + > + if (ch & NS2501_8_PD) > + return true; > + else > + return false; > +} > + > +/* set the NS2501 power state */ > static void ns2501_dpms(struct intel_dvo_device *dvo, bool enable) > { > bool ok; > @@ -568,6 +582,7 @@ struct intel_dvo_dev_ops ns2501_ops = { > .mode_valid = ns2501_mode_valid, > .mode_set = ns2501_mode_set, > .dpms = ns2501_dpms, > + .get_hw_state = ns2501_get_hw_state, > .dump_regs = ns2501_dump_regs, > .destroy = ns2501_destroy, > }; > diff --git a/drivers/gpu/drm/i915/dvo_sil164.c b/drivers/gpu/drm/i915/dvo_sil164.c > index cc24c1c..4debd32 100644 > --- a/drivers/gpu/drm/i915/dvo_sil164.c > +++ b/drivers/gpu/drm/i915/dvo_sil164.c > @@ -226,6 +226,21 @@ static void sil164_dpms(struct intel_dvo_device *dvo, bool enable) > return; > } > > +static bool sil164_get_hw_state(struct intel_dvo_device *dvo) > +{ > + int ret; > + unsigned char ch; > + > + ret = sil164_readb(dvo, SIL164_REG8, &ch); > + if (ret == false) > + return false; > + > + if (ch & SIL164_8_PD) > + return true; > + else > + return false; > +} > + > static void sil164_dump_regs(struct intel_dvo_device *dvo) > { > uint8_t val; > @@ -258,6 +273,7 @@ struct intel_dvo_dev_ops sil164_ops = { > .mode_valid = sil164_mode_valid, > .mode_set = sil164_mode_set, > .dpms = sil164_dpms, > + .get_hw_state = sil164_get_hw_state, > .dump_regs = sil164_dump_regs, > .destroy = sil164_destroy, > }; > diff --git a/drivers/gpu/drm/i915/dvo_tfp410.c b/drivers/gpu/drm/i915/dvo_tfp410.c > index 097b3e8..e17f1b0 100644 > --- a/drivers/gpu/drm/i915/dvo_tfp410.c > +++ b/drivers/gpu/drm/i915/dvo_tfp410.c > @@ -249,6 +249,19 @@ static void tfp410_dpms(struct intel_dvo_device *dvo, bool enable) > tfp410_writeb(dvo, TFP410_CTL_1, ctl1); > } > > +static bool tfp410_get_hw_state(struct intel_dvo_device *dvo) > +{ > + uint8_t ctl1; > + > + if (!tfp410_readb(dvo, TFP410_CTL_1, &ctl1)) > + return false; > + > + if (ctl1 & TFP410_CTL_1_PD) > + return true; > + else > + return false; > +} > + > static void tfp410_dump_regs(struct intel_dvo_device *dvo) > { > uint8_t val, val2; > @@ -299,6 +312,7 @@ struct intel_dvo_dev_ops tfp410_ops = { > .mode_valid = tfp410_mode_valid, > .mode_set = tfp410_mode_set, > .dpms = tfp410_dpms, > + .get_hw_state = tfp410_get_hw_state, > .dump_regs = tfp410_dump_regs, > .destroy = tfp410_destroy, > }; > diff --git a/drivers/gpu/drm/i915/intel_dvo.c b/drivers/gpu/drm/i915/intel_dvo.c > index 84c0867..e9397b7 100644 > --- a/drivers/gpu/drm/i915/intel_dvo.c > +++ b/drivers/gpu/drm/i915/intel_dvo.c > @@ -105,6 +105,31 @@ static struct intel_dvo *intel_attached_dvo(struct drm_connector *connector) > struct intel_dvo, base); > } > > +static bool intel_dvo_connector_get_hw_state(struct intel_connector *connector) > +{ > + struct intel_dvo *intel_dvo = intel_attached_dvo(&connector->base); > + > + return intel_dvo->dev.dev_ops->get_hw_state(&intel_dvo->dev); > +} > + > +static bool intel_dvo_get_hw_state(struct intel_encoder *encoder, > + enum pipe *pipe) > +{ > + struct drm_device *dev = encoder->base.dev; > + struct drm_i915_private *dev_priv = dev->dev_private; > + struct intel_dvo *intel_dvo = enc_to_intel_dvo(&encoder->base); > + u32 tmp; > + > + tmp = I915_READ(intel_dvo->dev.dvo_reg); > + > + if (!(tmp & DVO_ENABLE)) > + return false; > + > + *pipe = PORT_TO_PIPE(tmp); > + > + return true; > +} > + > static void intel_disable_dvo(struct intel_encoder *encoder) > { > struct drm_i915_private *dev_priv = encoder->base.dev->dev_private; > @@ -414,6 +439,8 @@ void intel_dvo_init(struct drm_device *dev) > > intel_encoder->disable = intel_disable_dvo; > intel_encoder->enable = intel_enable_dvo; > + intel_encoder->get_hw_state = intel_dvo_get_hw_state; > + intel_connector->get_hw_state = intel_dvo_connector_get_hw_state; > > /* Now, try to find a controller */ > for (i = 0; i < ARRAY_SIZE(intel_dvo_devices); i++) { Uhh yes. Acked-by: Jesse Barnes <jbarnes@virtuousgeek.org>
diff --git a/drivers/gpu/drm/i915/dvo.h b/drivers/gpu/drm/i915/dvo.h index 0fa839e..74b5efc 100644 --- a/drivers/gpu/drm/i915/dvo.h +++ b/drivers/gpu/drm/i915/dvo.h @@ -114,6 +114,12 @@ struct intel_dvo_dev_ops { */ enum drm_connector_status (*detect)(struct intel_dvo_device *dvo); + /* + * Probe the current hw status, returning true if the connected output + * is active. + */ + bool (*get_hw_state)(struct intel_dvo_device *dev); + /** * Query the device for the modes it provides. * diff --git a/drivers/gpu/drm/i915/dvo_ch7017.c b/drivers/gpu/drm/i915/dvo_ch7017.c index 71e7650..86b27d1 100644 --- a/drivers/gpu/drm/i915/dvo_ch7017.c +++ b/drivers/gpu/drm/i915/dvo_ch7017.c @@ -359,6 +359,18 @@ static void ch7017_dpms(struct intel_dvo_device *dvo, bool enable) msleep(20); } +static bool ch7017_get_hw_state(struct intel_dvo_device *dvo) +{ + uint8_t val; + + ch7017_read(dvo, CH7017_LVDS_POWER_DOWN, &val); + + if (val & CH7017_LVDS_POWER_DOWN_EN) + return false; + else + return true; +} + static void ch7017_dump_regs(struct intel_dvo_device *dvo) { uint8_t val; @@ -396,6 +408,7 @@ struct intel_dvo_dev_ops ch7017_ops = { .mode_valid = ch7017_mode_valid, .mode_set = ch7017_mode_set, .dpms = ch7017_dpms, + .get_hw_state = ch7017_get_hw_state, .dump_regs = ch7017_dump_regs, .destroy = ch7017_destroy, }; diff --git a/drivers/gpu/drm/i915/dvo_ch7xxx.c b/drivers/gpu/drm/i915/dvo_ch7xxx.c index c1dea5b..38f3a6c 100644 --- a/drivers/gpu/drm/i915/dvo_ch7xxx.c +++ b/drivers/gpu/drm/i915/dvo_ch7xxx.c @@ -297,6 +297,18 @@ static void ch7xxx_dpms(struct intel_dvo_device *dvo, bool enable) ch7xxx_writeb(dvo, CH7xxx_PM, CH7xxx_PM_FPD); } +static bool ch7xxx_get_hw_state(struct intel_dvo_device *dvo) +{ + u8 val; + + ch7xxx_readb(dvo, CH7xxx_PM, &val); + + if (val & CH7xxx_PM_FPD) + return false; + else + return true; +} + static void ch7xxx_dump_regs(struct intel_dvo_device *dvo) { int i; @@ -326,6 +338,7 @@ struct intel_dvo_dev_ops ch7xxx_ops = { .mode_valid = ch7xxx_mode_valid, .mode_set = ch7xxx_mode_set, .dpms = ch7xxx_dpms, + .get_hw_state = ch7xxx_get_hw_state, .dump_regs = ch7xxx_dump_regs, .destroy = ch7xxx_destroy, }; diff --git a/drivers/gpu/drm/i915/dvo_ivch.c b/drivers/gpu/drm/i915/dvo_ivch.c index fa8ff6b..baaf65b 100644 --- a/drivers/gpu/drm/i915/dvo_ivch.c +++ b/drivers/gpu/drm/i915/dvo_ivch.c @@ -323,6 +323,20 @@ static void ivch_dpms(struct intel_dvo_device *dvo, bool enable) udelay(16 * 1000); } +static bool ivch_get_hw_state(struct intel_dvo_device *dvo) +{ + uint16_t vr01; + + /* Set the new power state of the panel. */ + if (!ivch_read(dvo, VR01, &vr01)) + return false; + + if (vr01 & VR01_LCD_ENABLE) + return true; + else + return false; +} + static void ivch_mode_set(struct intel_dvo_device *dvo, struct drm_display_mode *mode, struct drm_display_mode *adjusted_mode) @@ -413,6 +427,7 @@ static void ivch_destroy(struct intel_dvo_device *dvo) struct intel_dvo_dev_ops ivch_ops = { .init = ivch_init, .dpms = ivch_dpms, + .get_hw_state = ivch_get_hw_state, .mode_valid = ivch_mode_valid, .mode_set = ivch_mode_set, .detect = ivch_detect, diff --git a/drivers/gpu/drm/i915/dvo_ns2501.c b/drivers/gpu/drm/i915/dvo_ns2501.c index c4d9f2f..c4a255b 100644 --- a/drivers/gpu/drm/i915/dvo_ns2501.c +++ b/drivers/gpu/drm/i915/dvo_ns2501.c @@ -493,6 +493,20 @@ static void ns2501_mode_set(struct intel_dvo_device *dvo, } /* set the NS2501 power state */ +static bool ns2501_get_hw_state(struct intel_dvo_device *dvo) +{ + unsigned char ch; + + if (!ns2501_readb(dvo, NS2501_REG8, &ch)) + return false; + + if (ch & NS2501_8_PD) + return true; + else + return false; +} + +/* set the NS2501 power state */ static void ns2501_dpms(struct intel_dvo_device *dvo, bool enable) { bool ok; @@ -568,6 +582,7 @@ struct intel_dvo_dev_ops ns2501_ops = { .mode_valid = ns2501_mode_valid, .mode_set = ns2501_mode_set, .dpms = ns2501_dpms, + .get_hw_state = ns2501_get_hw_state, .dump_regs = ns2501_dump_regs, .destroy = ns2501_destroy, }; diff --git a/drivers/gpu/drm/i915/dvo_sil164.c b/drivers/gpu/drm/i915/dvo_sil164.c index cc24c1c..4debd32 100644 --- a/drivers/gpu/drm/i915/dvo_sil164.c +++ b/drivers/gpu/drm/i915/dvo_sil164.c @@ -226,6 +226,21 @@ static void sil164_dpms(struct intel_dvo_device *dvo, bool enable) return; } +static bool sil164_get_hw_state(struct intel_dvo_device *dvo) +{ + int ret; + unsigned char ch; + + ret = sil164_readb(dvo, SIL164_REG8, &ch); + if (ret == false) + return false; + + if (ch & SIL164_8_PD) + return true; + else + return false; +} + static void sil164_dump_regs(struct intel_dvo_device *dvo) { uint8_t val; @@ -258,6 +273,7 @@ struct intel_dvo_dev_ops sil164_ops = { .mode_valid = sil164_mode_valid, .mode_set = sil164_mode_set, .dpms = sil164_dpms, + .get_hw_state = sil164_get_hw_state, .dump_regs = sil164_dump_regs, .destroy = sil164_destroy, }; diff --git a/drivers/gpu/drm/i915/dvo_tfp410.c b/drivers/gpu/drm/i915/dvo_tfp410.c index 097b3e8..e17f1b0 100644 --- a/drivers/gpu/drm/i915/dvo_tfp410.c +++ b/drivers/gpu/drm/i915/dvo_tfp410.c @@ -249,6 +249,19 @@ static void tfp410_dpms(struct intel_dvo_device *dvo, bool enable) tfp410_writeb(dvo, TFP410_CTL_1, ctl1); } +static bool tfp410_get_hw_state(struct intel_dvo_device *dvo) +{ + uint8_t ctl1; + + if (!tfp410_readb(dvo, TFP410_CTL_1, &ctl1)) + return false; + + if (ctl1 & TFP410_CTL_1_PD) + return true; + else + return false; +} + static void tfp410_dump_regs(struct intel_dvo_device *dvo) { uint8_t val, val2; @@ -299,6 +312,7 @@ struct intel_dvo_dev_ops tfp410_ops = { .mode_valid = tfp410_mode_valid, .mode_set = tfp410_mode_set, .dpms = tfp410_dpms, + .get_hw_state = tfp410_get_hw_state, .dump_regs = tfp410_dump_regs, .destroy = tfp410_destroy, }; diff --git a/drivers/gpu/drm/i915/intel_dvo.c b/drivers/gpu/drm/i915/intel_dvo.c index 84c0867..e9397b7 100644 --- a/drivers/gpu/drm/i915/intel_dvo.c +++ b/drivers/gpu/drm/i915/intel_dvo.c @@ -105,6 +105,31 @@ static struct intel_dvo *intel_attached_dvo(struct drm_connector *connector) struct intel_dvo, base); } +static bool intel_dvo_connector_get_hw_state(struct intel_connector *connector) +{ + struct intel_dvo *intel_dvo = intel_attached_dvo(&connector->base); + + return intel_dvo->dev.dev_ops->get_hw_state(&intel_dvo->dev); +} + +static bool intel_dvo_get_hw_state(struct intel_encoder *encoder, + enum pipe *pipe) +{ + struct drm_device *dev = encoder->base.dev; + struct drm_i915_private *dev_priv = dev->dev_private; + struct intel_dvo *intel_dvo = enc_to_intel_dvo(&encoder->base); + u32 tmp; + + tmp = I915_READ(intel_dvo->dev.dvo_reg); + + if (!(tmp & DVO_ENABLE)) + return false; + + *pipe = PORT_TO_PIPE(tmp); + + return true; +} + static void intel_disable_dvo(struct intel_encoder *encoder) { struct drm_i915_private *dev_priv = encoder->base.dev->dev_private; @@ -414,6 +439,8 @@ void intel_dvo_init(struct drm_device *dev) intel_encoder->disable = intel_disable_dvo; intel_encoder->enable = intel_enable_dvo; + intel_encoder->get_hw_state = intel_dvo_get_hw_state; + intel_connector->get_hw_state = intel_dvo_connector_get_hw_state; /* Now, try to find a controller */ for (i = 0; i < ARRAY_SIZE(intel_dvo_devices); i++) {
Similar to the sdvo code we poke the dvo encoder whether the output is active. Safe that dvo encoders are not standardized, so this requires a new callback into the dvo chip driver. Hence implement that for all 6 dvo drivers. v2: With the newly added ns2501 we now have 6 dvo drivers instead of just 5 ... Signed-Off-by: Daniel Vetter <daniel.vetter@ffwll.ch> --- drivers/gpu/drm/i915/dvo.h | 6 ++++++ drivers/gpu/drm/i915/dvo_ch7017.c | 13 +++++++++++++ drivers/gpu/drm/i915/dvo_ch7xxx.c | 13 +++++++++++++ drivers/gpu/drm/i915/dvo_ivch.c | 15 +++++++++++++++ drivers/gpu/drm/i915/dvo_ns2501.c | 15 +++++++++++++++ drivers/gpu/drm/i915/dvo_sil164.c | 16 ++++++++++++++++ drivers/gpu/drm/i915/dvo_tfp410.c | 14 ++++++++++++++ drivers/gpu/drm/i915/intel_dvo.c | 27 +++++++++++++++++++++++++++ 8 files changed, 119 insertions(+)