From patchwork Sun Aug 19 19:12:51 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Daniel Vetter X-Patchwork-Id: 1345071 Return-Path: X-Original-To: patchwork-intel-gfx@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork1.kernel.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by patchwork1.kernel.org (Postfix) with ESMTP id 4EB5A3FC33 for ; Sun, 19 Aug 2012 20:43:23 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 3A999A1047 for ; Sun, 19 Aug 2012 13:43:23 -0700 (PDT) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mail-wg0-f43.google.com (mail-wg0-f43.google.com [74.125.82.43]) by gabe.freedesktop.org (Postfix) with ESMTP id 5017EA1043 for ; Sun, 19 Aug 2012 13:20:59 -0700 (PDT) Received: by mail-wg0-f43.google.com with SMTP id dr1so4210645wgb.12 for ; Sun, 19 Aug 2012 13:20:59 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ffwll.ch; s=google; h=from:to:cc:subject:date:message-id:x-mailer:in-reply-to:references; bh=M8IUJxcly7fULXlhisajcpSsqWY51c+KTO1q9J4jE70=; b=JkwY9Y59A1R4olsoWTIWz3GalOZCdXRaghhdCafzYHknfJIW1ZvtuOJHUbory9YSXN eLHPkLjGjm+4IWdQnOsr1VuZNOCihJEwhsDZ7r8DX6sIRRzeH7n13vVoLuB1nZebtDzE GSXaYic4ZPn231IPIsgf1IzyIqC72GZvuYBUg= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20120113; h=from:to:cc:subject:date:message-id:x-mailer:in-reply-to:references :x-gm-message-state; bh=M8IUJxcly7fULXlhisajcpSsqWY51c+KTO1q9J4jE70=; b=RHI7IhU93m4urMzAngMstVV/loc7eOZw5thTYpJU8d7tq8LkUZVDSI5NQj3WOGWdZO hp04w9TbZBJ/yR/UQEoej6db4GMb0PALTOZc9SykOArXWrMFUYGdnfH7//00fYh5pdXp m4dBjv8Yno2bc8OsC7JQeYHh9jjhInxDK2jhi80wi0aN6IITnEsgtRvCzLjPBoI5Jjfu VpIW5nBWhnap+XgmlG4HArovXoLEV1ubUWMwqdOrBbGbYuQLTa9tRRrubwsFC/WsZymD 7KA+Lp3gr6VKSlnDPIPXmjHWWrw4M7xU+B5Y+nsNHcrKUzKLsR0VJNJsHLKJSrzBk5d4 zb+w== Received: by 10.180.20.11 with SMTP id j11mr22872725wie.12.1345407659754; Sun, 19 Aug 2012 13:20:59 -0700 (PDT) Received: from wespe.ffwll.local (178-83-130-250.dynamic.hispeed.ch. [178.83.130.250]) by mx.google.com with ESMTPS id fu8sm24194367wib.5.2012.08.19.13.20.58 (version=TLSv1/SSLv3 cipher=OTHER); Sun, 19 Aug 2012 13:20:59 -0700 (PDT) From: Daniel Vetter To: Intel Graphics Development Date: Sun, 19 Aug 2012 21:12:51 +0200 Message-Id: <1345403595-9678-35-git-send-email-daniel.vetter@ffwll.ch> X-Mailer: git-send-email 1.7.11.2 In-Reply-To: <1345403595-9678-1-git-send-email-daniel.vetter@ffwll.ch> References: <1345403595-9678-1-git-send-email-daniel.vetter@ffwll.ch> X-Gm-Message-State: ALoCoQnoK0h6Nwo1IESgATmKC6n8gqwiXHPhVyKy17sJT/nic4q8Ak9Wyjo03nbZPiN0lF7ONELr Cc: Daniel Vetter Subject: [Intel-gfx] [PATCH 34/58] drm/i915: ensure the force pipe A quirk is actually followed X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.13 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: intel-gfx-bounces+patchwork-intel-gfx=patchwork.kernel.org@lists.freedesktop.org Errors-To: intel-gfx-bounces+patchwork-intel-gfx=patchwork.kernel.org@lists.freedesktop.org Many BIOSen forget to turn on the pipe A after resume (because they actually don't turn on anything), so we have to do that ourselves when sanitizing the hw state. I've discovered this due to the recent addition of a pipe WARN that takes the force quirk into account. v2: Actually try to enable the pipe with a proper configuration instead of simpyl switching it on with whatever random state the bios left it in after resume. v3: Fixup rebase conflict - the load_detect functions have lost their encoder argument. Signed-Off-by: Daniel Vetter Reviewed-by: Jesse Barnes --- drivers/gpu/drm/i915/intel_display.c | 36 ++++++++++++++++++++++++++++++++++++ 1 file changed, 36 insertions(+) diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c index 2cfb397..ab4fa7f 100644 --- a/drivers/gpu/drm/i915/intel_display.c +++ b/drivers/gpu/drm/i915/intel_display.c @@ -7602,6 +7602,33 @@ intel_connector_break_all_links(struct intel_connector *connector) connector->encoder->base.crtc = NULL; } +static void intel_enable_pipe_a(struct drm_device *dev) +{ + struct intel_connector *connector; + struct drm_connector *crt = NULL; + struct intel_load_detect_pipe load_detect_temp; + + /* We can't just switch on the pipe A, we need to set things up with a + * proper mode and output configuration. As a gross hack, enable pipe A + * by enabling the load detect pipe once. */ + list_for_each_entry(connector, + &dev->mode_config.connector_list, + base.head) { + if (connector->encoder->type == INTEL_OUTPUT_ANALOG) { + crt = &connector->base; + break; + } + } + + if (!crt) + return; + + if (intel_get_load_detect_pipe(crt, NULL, &load_detect_temp)) + intel_release_load_detect_pipe(crt, &load_detect_temp); + + +} + static void intel_sanitize_crtc(struct intel_crtc *crtc) { struct drm_device *dev = crtc->base.dev; @@ -7650,6 +7677,15 @@ static void intel_sanitize_crtc(struct intel_crtc *crtc) } ok: + if (dev_priv->quirks & QUIRK_PIPEA_FORCE && + crtc->pipe == PIPE_A && !crtc->active) { + /* BIOS forgot to enable pipe A, this mostly happens after + * resume. Force-enable the pipe to fix this, the update_dpms + * call below we restore the pipe to the right state, but leave + * the required bits on. */ + intel_enable_pipe_a(dev); + } + /* Adjust the state of the output pipe according to whether we * have active connectors/encoders. */ intel_crtc_update_dpms(&crtc->base);