From patchwork Sun Aug 19 19:13:07 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Daniel Vetter X-Patchwork-Id: 1345241 Return-Path: X-Original-To: patchwork-intel-gfx@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork1.kernel.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by patchwork1.kernel.org (Postfix) with ESMTP id 8AAD33FC33 for ; Sun, 19 Aug 2012 20:54:14 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 8EB919F311 for ; Sun, 19 Aug 2012 13:54:14 -0700 (PDT) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mail-wi0-f177.google.com (mail-wi0-f177.google.com [209.85.212.177]) by gabe.freedesktop.org (Postfix) with ESMTP id 39662A1038 for ; Sun, 19 Aug 2012 13:21:22 -0700 (PDT) Received: by mail-wi0-f177.google.com with SMTP id hn17so2755791wib.12 for ; Sun, 19 Aug 2012 13:21:21 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ffwll.ch; s=google; h=from:to:cc:subject:date:message-id:x-mailer:in-reply-to:references; bh=K+nhnpZloTVbmuZ5L6u9/arViBpaO+lIv6dow/v7DkU=; b=M108gL02kiEzcgnUHaF0lbcwGd3hZVUnRAs7hjd7MFnp8YysOOx0dTIwjclBqz9DZT Q9LFUKUsdS+5gztCuSXHa7ZKZli9tF/LSnmDLofsyUD64sZrXAC8uBWA51KovQD+Yt1T s1EvXwu0v61CwFo63MO1XDkLPqzenCSa+KyJE= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20120113; h=from:to:cc:subject:date:message-id:x-mailer:in-reply-to:references :x-gm-message-state; bh=K+nhnpZloTVbmuZ5L6u9/arViBpaO+lIv6dow/v7DkU=; b=VsXvcU0WuvwqOcKIZaqJSdi8lW+QcvoGdMzQ/tLirM0aVqkvkg2ptsm9OWgxoNwZDi WbfNFHJ3bHvfw05/nWTCD/sXCahBUKkLT64MhJElCe3YOeQNSsPgY4ue4AOjCmto9BX1 LADMxgLd8qdhxKhQIBSQnjq7Stjj8YVlGnCEAF3Tpd3IyMnF+MkwCigZGJsFieobG9Ok I6snn50xmGWzSrHE+ZLAwoZhTrjNINRPYliaSizTYgPwCe4wA8CgcbvPqN0coCDU7+PK 3LwhbKcaLu6O/LqBYnB5QriKU5ef62acWD/v5k+zU1zB4gCJKG8UgNcurRuvWayAUINw xCeQ== Received: by 10.180.105.163 with SMTP id gn3mr22928137wib.2.1345407681793; Sun, 19 Aug 2012 13:21:21 -0700 (PDT) Received: from wespe.ffwll.local (178-83-130-250.dynamic.hispeed.ch. [178.83.130.250]) by mx.google.com with ESMTPS id fu8sm24194367wib.5.2012.08.19.13.21.20 (version=TLSv1/SSLv3 cipher=OTHER); Sun, 19 Aug 2012 13:21:20 -0700 (PDT) From: Daniel Vetter To: Intel Graphics Development Date: Sun, 19 Aug 2012 21:13:07 +0200 Message-Id: <1345403595-9678-51-git-send-email-daniel.vetter@ffwll.ch> X-Mailer: git-send-email 1.7.11.2 In-Reply-To: <1345403595-9678-1-git-send-email-daniel.vetter@ffwll.ch> References: <1345403595-9678-1-git-send-email-daniel.vetter@ffwll.ch> X-Gm-Message-State: ALoCoQmxYTobc2uqs50litNXD8Ls06BMhbGYUrXxpSoO60OREpKPFjzLxjlW5gQuen8ezEG8IedU Cc: Daniel Vetter Subject: [Intel-gfx] [PATCH 50/58] drm/i915: compute masks of crtcs affected in set_mode X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.13 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: intel-gfx-bounces+patchwork-intel-gfx=patchwork.kernel.org@lists.freedesktop.org Errors-To: intel-gfx-bounces+patchwork-intel-gfx=patchwork.kernel.org@lists.freedesktop.org This is definetely a bit more generic than currently required, but if we keep track of all crtcs that need to be disabled/enable (because they loose an encoder or something similar), crtcs that get completely disabled and those that we need to do an actual mode change on nicely prepares us for global modeset operations on multiple crtcs. The only big thing missing here would be a global resource allocation step (for e.g. pch plls), which would equally frob these bitmasks if e.g. a crtc only needs a new pll. These masks aren't yet put to use in this patch, this will follow in the next one. v2-v5: Fix up the computations for good (hopefully). Signed-off-by: Daniel Vetter Reviewed-by: Jesse Barnes --- drivers/gpu/drm/i915/intel_display.c | 89 ++++++++++++++++++++++++++++++++++++ 1 file changed, 89 insertions(+) diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c index c59569e..4334400 100644 --- a/drivers/gpu/drm/i915/intel_display.c +++ b/drivers/gpu/drm/i915/intel_display.c @@ -6706,6 +6706,91 @@ fail: return ERR_PTR(-EINVAL); } +/* Computes which crtcs are affected and sets the relevant bits in the mask. For + * simplicity we use the crtc's pipe number (because it's easier to obtain). */ +static void +intel_modeset_affected_pipes(struct drm_crtc *crtc, unsigned *modeset_pipes, + unsigned *prepare_pipes, unsigned *disable_pipes) +{ + struct intel_crtc *intel_crtc; + struct drm_device *dev = crtc->dev; + struct intel_encoder *encoder; + struct intel_connector *connector; + struct drm_crtc *tmp_crtc; + + *disable_pipes = *modeset_pipes = *prepare_pipes = 0; + + /* Check which crtcs have changed outputs connected to them, these need + * to be part of the prepare_pipes mask. We don't (yet) support global + * modeset across multiple crtcs, so modeset_pipes will only have one + * bit set at most. */ + list_for_each_entry(connector, &dev->mode_config.connector_list, + base.head) { + if (connector->base.encoder == &connector->new_encoder->base) + continue; + + if (connector->base.encoder) { + tmp_crtc = connector->base.encoder->crtc; + + *prepare_pipes |= 1 << to_intel_crtc(tmp_crtc)->pipe; + } + + if (connector->new_encoder) + *prepare_pipes |= + 1 << connector->new_encoder->new_crtc->pipe; + } + + list_for_each_entry(encoder, &dev->mode_config.encoder_list, + base.head) { + if (encoder->base.crtc == &encoder->new_crtc->base) + continue; + + if (encoder->base.crtc) { + tmp_crtc = encoder->base.crtc; + + *prepare_pipes |= 1 << to_intel_crtc(tmp_crtc)->pipe; + } + + if (encoder->new_crtc) + *prepare_pipes |= 1 << encoder->new_crtc->pipe; + } + + /* Check for any pipes that will be fully disabled ... */ + list_for_each_entry(intel_crtc, &dev->mode_config.crtc_list, + base.head) { + bool used = false; + + /* Don't try to disable disabled crtcs. */ + if (!intel_crtc->base.enabled) + continue; + + list_for_each_entry(encoder, &dev->mode_config.encoder_list, + base.head) { + if (encoder->new_crtc == intel_crtc) + used = true; + } + + if (!used) + *disable_pipes |= 1 << intel_crtc->pipe; + } + + + /* set_mode is also used to update properties on life display pipes. */ + intel_crtc = to_intel_crtc(crtc); + if (!*disable_pipes && crtc->enabled) + *prepare_pipes |= 1 << intel_crtc->pipe; + + /* We only support modeset on one single crtc, hence we need to do that + * only for the passed in crtc iff we change anything else than just + * disable crtcs. */ + if (*prepare_pipes) + *modeset_pipes |= 1 << intel_crtc->pipe; + + /* ... and mask these out. */ + *modeset_pipes &= ~(*disable_pipes); + *prepare_pipes &= ~(*disable_pipes); +} + bool intel_set_mode(struct drm_crtc *crtc, struct drm_display_mode *mode, int x, int y, struct drm_framebuffer *fb) @@ -6715,8 +6800,12 @@ bool intel_set_mode(struct drm_crtc *crtc, struct drm_display_mode *adjusted_mode, saved_mode, saved_hwmode; struct drm_encoder_helper_funcs *encoder_funcs; struct drm_encoder *encoder; + unsigned disable_pipe, prepare_pipes, modeset_pipes; bool ret = true; + intel_modeset_affected_pipes(crtc, &modeset_pipes, + &prepare_pipes, &disable_pipe); + intel_modeset_commit_output_state(dev); crtc->enabled = drm_helper_crtc_in_use(crtc);