From patchwork Mon Aug 20 08:24:46 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Daniel Vetter X-Patchwork-Id: 1347411 Return-Path: X-Original-To: patchwork-intel-gfx@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork2.kernel.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by patchwork2.kernel.org (Postfix) with ESMTP id 8D694DFF0F for ; Mon, 20 Aug 2012 09:31:58 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 4B8339ECD4 for ; Mon, 20 Aug 2012 02:31:58 -0700 (PDT) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mail-we0-f177.google.com (mail-we0-f177.google.com [74.125.82.177]) by gabe.freedesktop.org (Postfix) with ESMTP id C26209E7B0 for ; Mon, 20 Aug 2012 02:31:44 -0700 (PDT) Received: by weyr3 with SMTP id r3so4121114wey.36 for ; Mon, 20 Aug 2012 02:31:44 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ffwll.ch; s=google; h=from:to:cc:subject:date:message-id:x-mailer:in-reply-to:references; bh=4tSJ2cCtpB2iCAKNgQpb233kd//BXdOeo9axblgOJnU=; b=ZVlpa8yFkoMfMT/5Qa+AdUDpZjRYctg99vQW2qAf/t0V6HxIk8UIFxiNMy8YGgzWVZ qCsCFzR/CWl3Uci5lUXHOI2Brob3XwNCXiyQNoYrxeRDTkDuZRkgMqEqsGL5HwrM+PVC IcZK2I1PhWbR6vM1kgippc7Bcx/0kSNyBuel4= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20120113; h=from:to:cc:subject:date:message-id:x-mailer:in-reply-to:references :x-gm-message-state; bh=4tSJ2cCtpB2iCAKNgQpb233kd//BXdOeo9axblgOJnU=; b=fWafOoG9Rn8+d0c5V7nRybLvxvjje+7A/DPS6AnoAwgXJfMmavVCg7qA1RuUkjT+uO 6MPcO3BNUbITIXcoYpyUuh8uz5ZQok7yLg60XFPpyUE5cE0+HRrp7KRPEMbg0RwtxLtl Hq24DlwZzzlgkgnEwIe4Cku6LGNR18/yLFFDCFLIzAmnLK8R/e4B4idMv8vJewjoGUJL bGx5x/CpDM4u0pEgLBhRC/AGLxgiN2gPKSzlWD0mflrx9UO/4M0Fur29ivzoII28VjO5 5wOOg8Hnf0HRHKjO+aTKBw3OE0+3OJOSuGG5fhGHcGW7TG9qJGIdxaJHTGnnSFmIQ1y0 2IwQ== Received: by 10.180.104.200 with SMTP id gg8mr27473165wib.14.1345455103609; Mon, 20 Aug 2012 02:31:43 -0700 (PDT) Received: from wespe.ffwll.local (178-83-130-250.dynamic.hispeed.ch. [178.83.130.250]) by mx.google.com with ESMTPS id ck9sm40287953wib.2.2012.08.20.02.31.41 (version=TLSv1/SSLv3 cipher=OTHER); Mon, 20 Aug 2012 02:31:42 -0700 (PDT) From: Daniel Vetter To: Intel Graphics Development Date: Mon, 20 Aug 2012 10:24:46 +0200 Message-Id: <1345451086-27248-1-git-send-email-daniel.vetter@ffwll.ch> X-Mailer: git-send-email 1.7.11.2 In-Reply-To: <1345403595-9678-59-git-send-email-daniel.vetter@ffwll.ch> References: <1345403595-9678-59-git-send-email-daniel.vetter@ffwll.ch> X-Gm-Message-State: ALoCoQm5hwolQQ2PDWi9KJEi/IHcHjA4Rhwr1MLPr4obRahYEiDyt5+IDp3NxH7accFRtxHikD34 Cc: Daniel Vetter Subject: [Intel-gfx] [PATCH] drm/i915: add tons of modeset state checks X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.13 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: intel-gfx-bounces+patchwork-intel-gfx=patchwork.kernel.org@lists.freedesktop.org Errors-To: intel-gfx-bounces+patchwork-intel-gfx=patchwork.kernel.org@lists.freedesktop.org ... let's see how whether this catches anything earlier and I can track down a few bugs. v2: Add more checks and also add DRM_DEBUG_KMS output so that it's clear which connector/encoder/crtc is being checked atm. Which proved rather useful for debugging ... v3: Add a WARN in the common encoder dpms function, now that also modeset changes properly update the dpms state ... v4: Properly add a short explanation for each WARN, to avoid the need to correlate dmesg lines with source lines accurately. Suggested by Chris Wilson. Signed-Off-by: Daniel Vetter --- drivers/gpu/drm/i915/intel_display.c | 84 +++++++++++++++++++++++++++++++++++- 1 file changed, 83 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c index 95a9f04..5d592f1 100644 --- a/drivers/gpu/drm/i915/intel_display.c +++ b/drivers/gpu/drm/i915/intel_display.c @@ -3637,7 +3637,7 @@ void intel_connector_dpms(struct drm_connector *connector, int mode) if (encoder->base.crtc) intel_encoder_dpms(encoder, mode); else - encoder->connectors_active = false; + WARN_ON(encoder->connectors_active != false); intel_connector_check_state(to_intel_connector(connector)); } @@ -6823,6 +6823,84 @@ static bool intel_crtc_in_use(struct drm_crtc *crtc) base.head) \ if (mask & (1 <<(intel_crtc)->pipe)) \ +static void +intel_modeset_check_state(struct drm_device *dev) +{ + struct intel_crtc *crtc; + struct intel_encoder *encoder; + struct intel_connector *connector; + + list_for_each_entry(connector, &dev->mode_config.connector_list, + base.head) { + /* This also checks the encoder/connector hw state with the + * ->get_hw_state callbacks. */ + intel_connector_check_state(connector); + + WARN(&connector->new_encoder->base != connector->base.encoder, + "connector's staged encoder doesn't match current encoder\n"); + } + + list_for_each_entry(encoder, &dev->mode_config.encoder_list, + base.head) { + bool enabled = false; + bool active = false; + enum pipe pipe; + + DRM_DEBUG_KMS("[ENCODER:%d:%s]\n", + encoder->base.base.id, + drm_get_encoder_name(&encoder->base)); + + WARN(&encoder->new_crtc->base != encoder->base.crtc, + "encoder's stage crtc doesn't match current crtc\n"); + WARN(encoder->connectors_active && !encoder->base.crtc, + "encoder's active_connectors set, but no crtc\n"); + + list_for_each_entry(connector, &dev->mode_config.connector_list, + base.head) { + if (connector->base.encoder != &encoder->base) + continue; + enabled = true; + if (connector->base.dpms == DRM_MODE_DPMS_ON) + active = true; + } + WARN(!!encoder->base.crtc != enabled, + "encoder's enabled state mismatch\n"); + /* dpms on only implies active. */ + WARN(active && !encoder->base.crtc, + "active encoder with no crtc\n"); + WARN(encoder->get_hw_state(encoder, &pipe) + && !encoder->base.crtc, + "encoder's hw state doesn't match sw tracking\n"); + } + + list_for_each_entry(crtc, &dev->mode_config.crtc_list, + base.head) { + bool enabled = false; + bool active = false; + + DRM_DEBUG_KMS("[CRTC:%d]\n", + crtc->base.base.id); + + WARN(crtc->active && !crtc->base.enabled, + "active crtc, but not enabled in sw tracking\n"); + + list_for_each_entry(encoder, &dev->mode_config.encoder_list, + base.head) { + if (encoder->base.crtc != &crtc->base) + continue; + enabled = true; + if (encoder->connectors_active) + active = true; + } + WARN(active != crtc->active, + "crtc's computed active state doesn't match tracked active state\n"); + WARN(enabled != crtc->base.enabled, + "crtc's computed enabled state doesn't match tracked enabled state\n"); + + assert_pipe(dev->dev_private, crtc->pipe, crtc->active); + } +} + bool intel_set_mode(struct drm_crtc *crtc, struct drm_display_mode *mode, int x, int y, struct drm_framebuffer *fb) @@ -6947,6 +7025,8 @@ done: crtc->mode = saved_mode; } + intel_modeset_check_state(dev); + return ret; } @@ -8142,6 +8222,8 @@ void intel_modeset_setup_hw_state(struct drm_device *dev) } intel_modeset_update_staged_output_state(dev); + + intel_modeset_check_state(dev); } void intel_modeset_gem_init(struct drm_device *dev)