From patchwork Fri Aug 24 14:48:14 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Daniel Vetter X-Patchwork-Id: 1371541 Return-Path: X-Original-To: patchwork-intel-gfx@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork2.kernel.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by patchwork2.kernel.org (Postfix) with ESMTP id EB469DF28C for ; Fri, 24 Aug 2012 14:48:07 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id D24369EEF5 for ; Fri, 24 Aug 2012 07:48:07 -0700 (PDT) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mail-wg0-f41.google.com (mail-wg0-f41.google.com [74.125.82.41]) by gabe.freedesktop.org (Postfix) with ESMTP id BC6139E8B6 for ; Fri, 24 Aug 2012 07:47:54 -0700 (PDT) Received: by wgbds1 with SMTP id ds1so962009wgb.0 for ; Fri, 24 Aug 2012 07:47:53 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ffwll.ch; s=google; h=from:to:cc:subject:date:message-id:x-mailer; bh=Bz8dNRg/X7Jl9uVIlKTe5XBxe/+Ytup86MqHcuwC24s=; b=QlAgF+sUfC5mWwEqs0fjLVQQzSfxBnh+o2hI3vFKprrUMwFFkG9McsJvXad57UJzlW 45kW/V63AKI1O2Ga/ZK3SrAiL0P1rPgH6tP0OZDazcUh0bRbyfc42ZmCrWK8Wb1gVlVy VX8Vtsz7TSlU9z9YL/ctYBMDi7xyqf4jDK+oQ= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20120113; h=from:to:cc:subject:date:message-id:x-mailer:x-gm-message-state; bh=Bz8dNRg/X7Jl9uVIlKTe5XBxe/+Ytup86MqHcuwC24s=; b=FiQVEPvOE/sUYQj1Hv4w9wPMNEjcpgNv+ZmkHBV93oS778dkQVE3OaYM12PvenHkwS u8BS4eVKX0L/QCqIhiC5FBHx1Z2MiUi94fiKcodHj9b2q9ENYKLw2ypBsBPp9blMgBnP 7Hw1gZRGmEB3p/tHV5Ye/cEYJ47f4WDnDXkWuxZBwK6XBG9Hd6aEeMuiLR4itPXrWhF2 6gyxyYCHmJ59uZgkFthTvIiSNMRnJqtsFCwvUVwCion5r90t9OZH9NNrBsJXR8VR4u78 zmWalmnri0tUScUULq9YC2hzJ7qzivaPVEERPj8ThJFH4tyVdCh6a1wX+1+mXkqTNA6Q U8VQ== Received: by 10.180.78.99 with SMTP id a3mr6091818wix.15.1345819673761; Fri, 24 Aug 2012 07:47:53 -0700 (PDT) Received: from phenom.ffwll.local (178-83-130-250.dynamic.hispeed.ch. [178.83.130.250]) by mx.google.com with ESMTPS id bc2sm63361wib.0.2012.08.24.07.47.52 (version=TLSv1/SSLv3 cipher=OTHER); Fri, 24 Aug 2012 07:47:52 -0700 (PDT) From: Daniel Vetter To: Intel Graphics Development Date: Fri, 24 Aug 2012 16:48:14 +0200 Message-Id: <1345819694-22891-1-git-send-email-daniel.vetter@ffwll.ch> X-Mailer: git-send-email 1.7.10.4 X-Gm-Message-State: ALoCoQnfE02uPHpqqf+F2iEfdeIj6FVI+yxaOxtvJwDJgpFPnxkQ9AbGDCQHQ9wQzt3S5yFy7ire Cc: Daniel Vetter , "Widawsky, Benjamin" Subject: [Intel-gfx] [PATCH] drm/i915: align vlv forcewake with common lore X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.13 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: intel-gfx-bounces+patchwork-intel-gfx=patchwork.kernel.org@lists.freedesktop.org Errors-To: intel-gfx-bounces+patchwork-intel-gfx=patchwork.kernel.org@lists.freedesktop.org For some odd reasons, the vlv forcewake code is rather different from all other platforms, with no clear justifaction. Adjust things: - don't check whether the gt is awak already (and bail out early), we need to grab a forcewake anyway. Otherwise the chip might go to sleep too early, and this would also screw up our forcewake accounting. - Like all other platforms, check whether the gt has cleared the forcewake bit in the _ACK register before setting it again. - Use _MASKED_BIT_ENABLE/DISABLE macros - Only use bit0 of the fw reg, not all 16 bits. - check the gtfifodb reg like on all other platforms in _put. - Drop the POSTING_READs for consitency. v2: Failure to git add ... again. Tested-by: "Purushothaman, Vijay A" Cc: "Widawsky, Benjamin" Signed-Off-by: Daniel Vetter --- drivers/gpu/drm/i915/intel_pm.c | 14 ++++++-------- 1 file changed, 6 insertions(+), 8 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c index 94aabca..839581a 100644 --- a/drivers/gpu/drm/i915/intel_pm.c +++ b/drivers/gpu/drm/i915/intel_pm.c @@ -4064,12 +4064,10 @@ int __gen6_gt_wait_for_fifo(struct drm_i915_private *dev_priv) static void vlv_force_wake_get(struct drm_i915_private *dev_priv) { - /* Already awake? */ - if ((I915_READ(0x130094) & 0xa1) == 0xa1) - return; + if (wait_for_atomic_us((I915_READ_NOTRACE(FORCEWAKE_ACK_VLV) & 1) == 0, 500)) + DRM_ERROR("Force wake wait timed out\n"); - I915_WRITE_NOTRACE(FORCEWAKE_VLV, 0xffffffff); - POSTING_READ(FORCEWAKE_VLV); + I915_WRITE_NOTRACE(FORCEWAKE_VLV, _MASKED_BIT_ENABLE(1)); if (wait_for_atomic_us((I915_READ_NOTRACE(FORCEWAKE_ACK_VLV) & 1), 500)) DRM_ERROR("Force wake wait timed out\n"); @@ -4079,9 +4077,9 @@ static void vlv_force_wake_get(struct drm_i915_private *dev_priv) static void vlv_force_wake_put(struct drm_i915_private *dev_priv) { - I915_WRITE_NOTRACE(FORCEWAKE_VLV, 0xffff0000); - /* FIXME: confirm VLV behavior with Punit folks */ - POSTING_READ(FORCEWAKE_VLV); + I915_WRITE_NOTRACE(FORCEWAKE_VLV, _MASKED_BIT_DISABLE(1)); + /* The below doubles as a POSTING_READ */ + gen6_gt_check_fifodbg(dev_priv); } void intel_gt_init(struct drm_device *dev)