From patchwork Fri Aug 24 15:26:20 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Daniel Vetter X-Patchwork-Id: 1371821 Return-Path: X-Original-To: patchwork-intel-gfx@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork1.kernel.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by patchwork1.kernel.org (Postfix) with ESMTP id 44BC93FC33 for ; Fri, 24 Aug 2012 15:26:17 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 12B47A0E7E for ; Fri, 24 Aug 2012 08:26:17 -0700 (PDT) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mail-bk0-f49.google.com (mail-bk0-f49.google.com [209.85.214.49]) by gabe.freedesktop.org (Postfix) with ESMTP id 30F91A02FA for ; Fri, 24 Aug 2012 08:26:03 -0700 (PDT) Received: by bkcji2 with SMTP id ji2so654308bkc.36 for ; Fri, 24 Aug 2012 08:26:02 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ffwll.ch; s=google; h=from:to:cc:subject:date:message-id:x-mailer; bh=S4KaGCKtUwQDe9bNskmI0paVksDS9GyVxBY3Qv+bsAI=; b=H7y7Wej7xyUlmcYEDZT/a9lcfQYHXTVQZSgITYK7XjDgbMon4Mh3O1lKLUYP3duD65 hFy1IFnYO1gkoqtxP/SPQhL1OO61UKmID6Z90UrUOFgpVhNGRSfppXhyPlMkFTPrbMmE VA7WVIwfQFClaVyqSSFNOw1LNkX1W9qYxX3Io= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20120113; h=from:to:cc:subject:date:message-id:x-mailer:x-gm-message-state; bh=S4KaGCKtUwQDe9bNskmI0paVksDS9GyVxBY3Qv+bsAI=; b=R17533H2KASrqX29nBuOLIwKOuK3sCAvkNdFXqFxECZFg6H3Hdej004GMN53FBJz7D vv0+nIIn8yqVMqixoHCuymNoHXrl28j4+7zCboUawF04FNzos2b7MOfNiQ9dx1MrgQpC BhsJEZTZ+k8KCMUwSXiGia+FeQlhxQL29PWsh0h0XiVr44ImyTxyw54Aj12u/+aZP2kK izCOhO0S8PQ9pB4HEOsWUpr7bOGJ2f+h7uq7Yy3fN7FtYqb9AdKXmVy76VQ2Dhl13+Jo BH8LJh9JG4X7IU5QMq5OkLRfRQ+Y7FmgvyMALyjaBo1tnsGqiy4gT4j6qhyHyXbPd2rU DWdA== Received: by 10.204.133.220 with SMTP id g28mr2085855bkt.117.1345821961888; Fri, 24 Aug 2012 08:26:01 -0700 (PDT) Received: from phenom.ffwll.local (178-83-130-250.dynamic.hispeed.ch. [178.83.130.250]) by mx.google.com with ESMTPS id 14sm6583860bkq.12.2012.08.24.08.25.59 (version=TLSv1/SSLv3 cipher=OTHER); Fri, 24 Aug 2012 08:26:00 -0700 (PDT) From: Daniel Vetter To: Intel Graphics Development Date: Fri, 24 Aug 2012 17:26:20 +0200 Message-Id: <1345821981-8208-1-git-send-email-daniel.vetter@ffwll.ch> X-Mailer: git-send-email 1.7.10.4 X-Gm-Message-State: ALoCoQlhdOk5NR/0wcEXxHbUFwKZw/fK+ttr/mdWjLV+HF1PzweO1jx+Gyi8PWb/wHkmjRQlJayB Cc: Daniel Vetter , "Widawsky, Benjamin" Subject: [Intel-gfx] [PATCH 1/2] drm/i915: align vlv forcewake with common lore X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.13 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: intel-gfx-bounces+patchwork-intel-gfx=patchwork.kernel.org@lists.freedesktop.org Errors-To: intel-gfx-bounces+patchwork-intel-gfx=patchwork.kernel.org@lists.freedesktop.org For some odd reasons, the vlv forcewake code is rather different from all other platforms, with no clear justification. Adjust things: - Don't check whether the gt is awake already (and bail out early), we need to grab a forcewake anyway. Otherwise the chip might go to sleep too early. And this would also screw up our forcewake accounting. - Like all other platforms, check whether the gt has cleared the forcewake bit in the _ACK register before setting it again. - Use _MASKED_BIT_ENABLE/DISABLE macros - Only use bit0 of the forcewake reg, not all 16 bits. - check the gtfifodb reg like on all other platforms in _put. - Drop the POSTING_READs for consistency. v2: Failure to git add ... again. v3: Fixup the spelling fail a bit. Tested-by: "Purushothaman, Vijay A" Cc: "Widawsky, Benjamin" Signed-Off-by: Daniel Vetter Tested-by: Ben Widawsky --- drivers/gpu/drm/i915/intel_pm.c | 14 ++++++-------- 1 file changed, 6 insertions(+), 8 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c index c0721ff..1a197da 100644 --- a/drivers/gpu/drm/i915/intel_pm.c +++ b/drivers/gpu/drm/i915/intel_pm.c @@ -4075,12 +4075,10 @@ int __gen6_gt_wait_for_fifo(struct drm_i915_private *dev_priv) static void vlv_force_wake_get(struct drm_i915_private *dev_priv) { - /* Already awake? */ - if ((I915_READ(0x130094) & 0xa1) == 0xa1) - return; + if (wait_for_atomic_us((I915_READ_NOTRACE(FORCEWAKE_ACK_VLV) & 1) == 0, 500)) + DRM_ERROR("Force wake wait timed out\n"); - I915_WRITE_NOTRACE(FORCEWAKE_VLV, 0xffffffff); - POSTING_READ(FORCEWAKE_VLV); + I915_WRITE_NOTRACE(FORCEWAKE_VLV, _MASKED_BIT_ENABLE(1)); if (wait_for_atomic_us((I915_READ_NOTRACE(FORCEWAKE_ACK_VLV) & 1), 500)) DRM_ERROR("Force wake wait timed out\n"); @@ -4090,9 +4088,9 @@ static void vlv_force_wake_get(struct drm_i915_private *dev_priv) static void vlv_force_wake_put(struct drm_i915_private *dev_priv) { - I915_WRITE_NOTRACE(FORCEWAKE_VLV, 0xffff0000); - /* FIXME: confirm VLV behavior with Punit folks */ - POSTING_READ(FORCEWAKE_VLV); + I915_WRITE_NOTRACE(FORCEWAKE_VLV, _MASKED_BIT_DISABLE(1)); + /* The below doubles as a POSTING_READ */ + gen6_gt_check_fifodbg(dev_priv); } void intel_gt_init(struct drm_device *dev)