From patchwork Wed Sep 12 21:24:09 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Daniel Vetter X-Patchwork-Id: 1446781 Return-Path: X-Original-To: patchwork-intel-gfx@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork1.kernel.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by patchwork1.kernel.org (Postfix) with ESMTP id 7794C3FCFC for ; Wed, 12 Sep 2012 21:07:07 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 632F3A0993 for ; Wed, 12 Sep 2012 14:07:07 -0700 (PDT) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mail-we0-f177.google.com (mail-we0-f177.google.com [74.125.82.177]) by gabe.freedesktop.org (Postfix) with ESMTP id D114A9E924 for ; Wed, 12 Sep 2012 14:06:54 -0700 (PDT) Received: by weyr3 with SMTP id r3so1306289wey.36 for ; Wed, 12 Sep 2012 14:06:53 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ffwll.ch; s=google; h=from:to:cc:subject:date:message-id:x-mailer; bh=/+7hfZmIpkXpuTYzcmjGEHgdkr37fopywfx08z11Ahs=; b=OHi1IyxC6Evc0P/SqSSVVCbDK6az9mg/gep63xYPDOTtuu+bVQFDkCZn7Rv6CRPsmo 95EqFDxmuyZVUPhvBMXLHxisj4uzdCVjw6u4YtmVr9gBiN6BFKCKlf8vcs0GzbOtb9YZ Aj0RgjP5RAyGbGXOuzy6rHB6Q9+b0C+RAbWSw= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20120113; h=from:to:cc:subject:date:message-id:x-mailer:x-gm-message-state; bh=/+7hfZmIpkXpuTYzcmjGEHgdkr37fopywfx08z11Ahs=; b=cC9CMo1DXzTzNIe1eft5+BKT9Qvhw3TS7icyoYswe+j2VTsv0/dDS4fgU5novtmruw uc7n/stBqw+0HQjjQq/nSvAoSTQE1LbRO9l/Jk25IYK1yE/SO65Jmo+w++VrY17087yD H20hQsRNePZJlwZ6NUZ6W2JYK8idW3PN1a2wkAZ7RCsoXA6w6RL3crfGOr1cV0/Kyfou qSXHxmtgFI/lKTrejzhaxR8zAK5vuAtkuaKT4nONSa2kc9uOO0j9Xk3f6L16rYdoKMWj bFj6jBibuL3ooWbSEqZfHYly9BWUg0nIQj8YwxEWY423HJH5NwiHppqmvEiT22HhBQge gb+g== Received: by 10.180.80.134 with SMTP id r6mr35308978wix.1.1347484013702; Wed, 12 Sep 2012 14:06:53 -0700 (PDT) Received: from hummel.ffwll.local (178-83-130-250.dynamic.hispeed.ch. [178.83.130.250]) by mx.google.com with ESMTPS id l6sm9837271wiz.4.2012.09.12.14.06.52 (version=TLSv1/SSLv3 cipher=OTHER); Wed, 12 Sep 2012 14:06:52 -0700 (PDT) From: Daniel Vetter To: Intel Graphics Development Date: Wed, 12 Sep 2012 23:24:09 +0200 Message-Id: <1347485049-19003-1-git-send-email-daniel.vetter@ffwll.ch> X-Mailer: git-send-email 1.7.10.4 X-Gm-Message-State: ALoCoQmfMKozKTJ049fWPR96PsZwb5Injq9iTqKSIeBS8I6yXoeIhDVzHRTtlpd2y/TOgYpep+je Cc: Daniel Vetter Subject: [Intel-gfx] [PATCH] drm/i915: rip out early dp port write for gm45/ilk X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.13 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: intel-gfx-bounces+patchwork-intel-gfx=patchwork.kernel.org@lists.freedesktop.org Errors-To: intel-gfx-bounces+patchwork-intel-gfx=patchwork.kernel.org@lists.freedesktop.org It's bogus. If I've followed the history of this piece of code correctly, i.e. the initial register write with the following vblank wait, this goes all the way back to the original enabling of DP support in commit a4fc5ed69817c73e32571ad7837bb707f9890009 Author: Keith Packard Date: Tue Apr 7 16:16:42 2009 -0700 drm/i915: Add Display Port support Unfortunately it seems to be nothing more than glorified duct-tape and sometimes actively harmful. Adam Jackson noticed this for CPT platforms with commit e85194641bec56179dcf5e1704ce5c6bf30340c6 Author: Adam Jackson Date: Thu Jul 21 17:48:38 2011 -0400 drm/i915/dp: Don't turn CPT DP ports on too early Unfortunately this kept the code around for ilk and gm45. The specific failure case I'm seeing here is that after a dpms off/on cycle we have the bits from the last link training (hopefully successful link training) set in intel_dp->DP. This is requiered so that complete_link_train can enable the port with the right tuning values. Unfortunately writing these again to the disabled port at dpms on time kills the port somehow until it's disabled - dp link training fails in an endless loop without this patch on my mobile ilk and gm45. Cc: Chris Wilson Signed-Off-by: Daniel Vetter Tested-by: Chris Wilson --- drivers/gpu/drm/i915/intel_dp.c | 13 ------------- 1 file changed, 13 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c index 376ae28..3a4ebd4 100644 --- a/drivers/gpu/drm/i915/intel_dp.c +++ b/drivers/gpu/drm/i915/intel_dp.c @@ -1778,25 +1778,12 @@ static void intel_dp_start_link_train(struct intel_dp *intel_dp) { struct drm_device *dev = intel_dp->base.base.dev; - struct drm_i915_private *dev_priv = dev->dev_private; - struct intel_crtc *intel_crtc = to_intel_crtc(intel_dp->base.base.crtc); int i; uint8_t voltage; bool clock_recovery = false; int voltage_tries, loop_tries; uint32_t DP = intel_dp->DP; - /* - * On CPT we have to enable the port in training pattern 1, which - * will happen below in intel_dp_set_link_train. Otherwise, enable - * the port and wait for it to become active. - */ - if (!HAS_PCH_CPT(dev)) { - I915_WRITE(intel_dp->output_reg, intel_dp->DP); - POSTING_READ(intel_dp->output_reg); - intel_wait_for_vblank(dev, intel_crtc->pipe); - } - /* Write the link configuration data */ intel_dp_aux_native_write(intel_dp, DP_LINK_BW_SET, intel_dp->link_configuration,