From patchwork Thu Sep 20 21:36:03 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Paulo Zanoni X-Patchwork-Id: 1487951 Return-Path: X-Original-To: patchwork-intel-gfx@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork1.kernel.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by patchwork1.kernel.org (Postfix) with ESMTP id 57BB63FE65 for ; Thu, 20 Sep 2012 21:37:58 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 5181CA0E92 for ; Thu, 20 Sep 2012 14:37:58 -0700 (PDT) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mail-gh0-f177.google.com (mail-gh0-f177.google.com [209.85.160.177]) by gabe.freedesktop.org (Postfix) with ESMTP id 4053AA0E98 for ; Thu, 20 Sep 2012 14:37:16 -0700 (PDT) Received: by ghbf20 with SMTP id f20so810395ghb.36 for ; Thu, 20 Sep 2012 14:37:15 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=from:to:cc:subject:date:message-id:x-mailer:in-reply-to:references; bh=mrzbLExH5ud7ETE8eK5BAJ6RvvYjdVg2rBQSPAjrhno=; b=rC7CnG5QC/4IZCGIINrQkFWEMe/OwIPVPmQDQTFUAWovr7noWTNen7zpK0V3cS2jjv tHRfoWGlNGwZE9SrHPSQa6QIY03iFKAw2GUVhLpPx7WyEXcHnQcICw2qn0E82c4tsJwU 8RqvWYOT/CaX0Sst4td8QPiF3Mt30TifPKrHxTzMh/DD6z1r7Pl2yRso4GMECODsN3Qd hiLuezCdcpMACPuSDisfJHA2Hb1uNQeUH6CrkoLN3x4gbS5h/KPx8SdwThQy+raLZbAC jdAtrEo5L1xqhkyVP7ydLwQu8W+asyjHOJrk3RzPKTBCSmOZhgJSNAu4/ePsn2qQ+5rf umkA== Received: by 10.236.151.110 with SMTP id a74mr3352176yhk.35.1348177035636; Thu, 20 Sep 2012 14:37:15 -0700 (PDT) Received: from vicky.domain.invalid ([187.112.178.243]) by mx.google.com with ESMTPS id s12sm7325805anh.2.2012.09.20.14.37.13 (version=TLSv1/SSLv3 cipher=OTHER); Thu, 20 Sep 2012 14:37:14 -0700 (PDT) From: Paulo Zanoni To: intel-gfx@lists.freedesktop.org Date: Thu, 20 Sep 2012 18:36:03 -0300 Message-Id: <1348176967-4323-2-git-send-email-przanoni@gmail.com> X-Mailer: git-send-email 1.7.10.4 In-Reply-To: <1348176967-4323-1-git-send-email-przanoni@gmail.com> References: <1348176967-4323-1-git-send-email-przanoni@gmail.com> Cc: Paulo Zanoni Subject: [Intel-gfx] [PATCH 1/5] drm/i915: don't recheck for invalid pipe bpp X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.13 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: intel-gfx-bounces+patchwork-intel-gfx=patchwork.kernel.org@lists.freedesktop.org Errors-To: intel-gfx-bounces+patchwork-intel-gfx=patchwork.kernel.org@lists.freedesktop.org From: Paulo Zanoni As noticed by Daniel Vetter, intel_pipe_choose_bpp_dither should already check for invalid bpp values and set a valid value, so remove the recheck inside ironlake_crtc_mode_set and also replace a "default" switch case inside ironlake_set_pipeconf with a BUG(). Signed-off-by: Paulo Zanoni Reviewed-by: Rodrigo Vivi --- drivers/gpu/drm/i915/intel_display.c | 15 +++------------ 1 file changed, 3 insertions(+), 12 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c index 947c97d..eb8248b 100644 --- a/drivers/gpu/drm/i915/intel_display.c +++ b/drivers/gpu/drm/i915/intel_display.c @@ -4624,8 +4624,8 @@ static void ironlake_set_pipeconf(struct drm_crtc *crtc, val |= PIPE_12BPC; break; default: - val |= PIPE_8BPC; - break; + /* Case prevented by intel_choose_pipe_bpp_dither. */ + BUG(); } val &= ~(PIPECONF_DITHER_EN | PIPECONF_DITHER_TYPE_MASK); @@ -4726,7 +4726,6 @@ static int ironlake_crtc_mode_set(struct drm_crtc *crtc, struct fdi_m_n m_n = {0}; u32 temp; int target_clock, pixel_multiplier, lane, link_bw, factor; - unsigned int pipe_bpp; bool dither; bool is_cpu_edp = false, is_pch_edp = false; @@ -4800,18 +4799,10 @@ static int ironlake_crtc_mode_set(struct drm_crtc *crtc, target_clock = adjusted_mode->clock; /* determine panel color depth */ - dither = intel_choose_pipe_bpp_dither(crtc, fb, &pipe_bpp, mode); + dither = intel_choose_pipe_bpp_dither(crtc, fb, &intel_crtc->bpp, mode); if (is_lvds && dev_priv->lvds_dither) dither = true; - if (pipe_bpp != 18 && pipe_bpp != 24 && pipe_bpp != 30 && - pipe_bpp != 36) { - WARN(1, "intel_choose_pipe_bpp returned invalid value %d\n", - pipe_bpp); - pipe_bpp = 24; - } - intel_crtc->bpp = pipe_bpp; - if (!lane) { /* * Account for spread spectrum to avoid