From patchwork Mon Sep 24 13:32:55 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Paulo Zanoni X-Patchwork-Id: 1497651 Return-Path: X-Original-To: patchwork-intel-gfx@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork2.kernel.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by patchwork2.kernel.org (Postfix) with ESMTP id 26963DF280 for ; Mon, 24 Sep 2012 13:35:37 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 045EC9EFF2 for ; Mon, 24 Sep 2012 06:35:37 -0700 (PDT) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mail-gg0-f177.google.com (mail-gg0-f177.google.com [209.85.161.177]) by gabe.freedesktop.org (Postfix) with ESMTP id C7529A0203 for ; Mon, 24 Sep 2012 06:33:21 -0700 (PDT) Received: by mail-gg0-f177.google.com with SMTP id m2so1581106ggn.36 for ; Mon, 24 Sep 2012 06:33:21 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=from:to:cc:subject:date:message-id:x-mailer:in-reply-to:references; bh=DBeUyKv3tzDCUPdmhTWr5E9oTtsKjob6jr0PzdZndNA=; b=bcGljru4bG9fbosgMtYJcnRINVz54xtopb7SPxKeXtD356klhpd9/q62hLxBDD6/Gw noSlMHWs10LZttXNdu/E0Rpy+/F09+vCeijFkaqOb/vSf63H/9wpsOK8oHtTsDLhShXA 3tqCwvGEuM3ypKItL6YmH2K/BRA3e6Fs87gzNc5winOKfrkTG921+rNX6Hhc7snaue1b BZAkiIFJHz2nZaUvJO47ueGk47NO+O9iouPh9EIVU3Sp4j4tfg4To04/8N4UI32mgcje yBXIrzip4vf8A5BORQl6u1M5tXcdcE60EPbhTfMk1hpV6qGq5QBxJcXyByfamy9fVq/2 4SxQ== Received: by 10.236.177.105 with SMTP id c69mr3679481yhm.48.1348493601551; Mon, 24 Sep 2012 06:33:21 -0700 (PDT) Received: from vicky.domain.invalid ([177.16.66.138]) by mx.google.com with ESMTPS id x3sm24808944yhd.9.2012.09.24.06.33.19 (version=TLSv1/SSLv3 cipher=OTHER); Mon, 24 Sep 2012 06:33:21 -0700 (PDT) From: Paulo Zanoni To: intel-gfx@lists.freedesktop.org Date: Mon, 24 Sep 2012 10:32:55 -0300 Message-Id: <1348493576-3386-2-git-send-email-przanoni@gmail.com> X-Mailer: git-send-email 1.7.10.4 In-Reply-To: <1348493576-3386-1-git-send-email-przanoni@gmail.com> References: <1348493576-3386-1-git-send-email-przanoni@gmail.com> Cc: Paulo Zanoni , stable@vger.kernel.org Subject: [Intel-gfx] [PATCH 2/2] drm/i915: make sure we write at least 32 DIP bytes X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.13 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: intel-gfx-bounces+patchwork-intel-gfx=patchwork.kernel.org@lists.freedesktop.org Errors-To: intel-gfx-bounces+patchwork-intel-gfx=patchwork.kernel.org@lists.freedesktop.org From: Paulo Zanoni If we don't write at least 32 DIP bytes the InfoFrame ECC may not be correctly calculated in some cases (e.g., when changing the port), and this will lead to black screens on HDMI monitors. The ECC value is generated by the hardware. I don't see how this should break anything since we're writing 0 and that should be the correct value, so this patch should be safe. This patch fixes bug #46761, which is marked as a regression introduced by commit 4e89ee174bb2da341bf90a84321c7008a3c9210d: drm/i915: set the DIP port on ibx_write_infoframe Before commit 4e89 we were just failing to send AVI infoframes when we needed to change the port, which can lead to black screens in some cases. After commit 4e89 we started sending infoframes, but with a possibly wrong ECC value. After this patch I hope we start sending correct infoframes. Cc: stable@vger.kernel.org Bugzilla: https://bugzilla.kernel.org/show_bug.cgi?id=46761 Signed-off-by: Paulo Zanoni --- drivers/gpu/drm/i915/intel_hdmi.c | 10 ++++++++++ 1 file changed, 10 insertions(+) diff --git a/drivers/gpu/drm/i915/intel_hdmi.c b/drivers/gpu/drm/i915/intel_hdmi.c index f9fb47c..4ca355e 100644 --- a/drivers/gpu/drm/i915/intel_hdmi.c +++ b/drivers/gpu/drm/i915/intel_hdmi.c @@ -151,6 +151,8 @@ static void g4x_write_infoframe(struct drm_encoder *encoder, I915_WRITE(VIDEO_DIP_DATA, *data); data++; } + for (; i < 32; i += 4) + I915_WRITE(VIDEO_DIP_DATA, 0); mmiowb(); val |= g4x_infoframe_enable(frame); @@ -186,6 +188,8 @@ static void ibx_write_infoframe(struct drm_encoder *encoder, I915_WRITE(TVIDEO_DIP_DATA(intel_crtc->pipe), *data); data++; } + for (; i < 32; i += 4) + I915_WRITE(TVIDEO_DIP_DATA(intel_crtc->pipe), 0); mmiowb(); val |= g4x_infoframe_enable(frame); @@ -224,6 +228,8 @@ static void cpt_write_infoframe(struct drm_encoder *encoder, I915_WRITE(TVIDEO_DIP_DATA(intel_crtc->pipe), *data); data++; } + for (; i < 32; i += 4) + I915_WRITE(TVIDEO_DIP_DATA(intel_crtc->pipe), 0); mmiowb(); val |= g4x_infoframe_enable(frame); @@ -259,6 +265,8 @@ static void vlv_write_infoframe(struct drm_encoder *encoder, I915_WRITE(VLV_TVIDEO_DIP_DATA(intel_crtc->pipe), *data); data++; } + for (; i < 32; i += 4) + I915_WRITE(VLV_TVIDEO_DIP_DATA(intel_crtc->pipe), 0); mmiowb(); val |= g4x_infoframe_enable(frame); @@ -292,6 +300,8 @@ static void hsw_write_infoframe(struct drm_encoder *encoder, I915_WRITE(data_reg + i, *data); data++; } + for (; i < 32; i += 4) + I915_WRITE(data_reg + i, 0); mmiowb(); val |= hsw_infoframe_enable(frame);