diff mbox

[10/47] drm/i915: pipe and planes should be disabled on haswell_crtc_mode_set

Message ID 1349211142-4802-11-git-send-email-przanoni@gmail.com (mailing list archive)
State New, archived
Headers show

Commit Message

Paulo Zanoni Oct. 2, 2012, 8:51 p.m. UTC 
From: Paulo Zanoni <paulo.r.zanoni@intel.com>

So WARN in case they're not. It also does not make any sense to
wait_for_vblank at this point.

Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
---
 drivers/gpu/drm/i915/intel_display.c |    7 +++++--
 1 file changed, 5 insertions(+), 2 deletions(-)

Comments

Lespiau, Damien Oct. 4, 2012, 2:14 p.m. UTC | #1 
On Tue, Oct 2, 2012 at 9:51 PM, Paulo Zanoni <przanoni@gmail.com> wrote:
> @@ -5356,8 +5361,6 @@ static int haswell_crtc_mode_set(struct drm_crtc *crtc,
>
>         haswell_set_pipeconf(crtc, adjusted_mode, dither);
>
> -       intel_wait_for_vblank(dev, pipe);
> -

I guess this hunk could go into a separate commit.
Paulo Zanoni Oct. 5, 2012, 12:53 p.m. UTC | #2 
2012/10/4 Lespiau, Damien <damien.lespiau@intel.com>:
> On Tue, Oct 2, 2012 at 9:51 PM, Paulo Zanoni <przanoni@gmail.com> wrote:
>> @@ -5356,8 +5361,6 @@ static int haswell_crtc_mode_set(struct drm_crtc *crtc,
>>
>>         haswell_set_pipeconf(crtc, adjusted_mode, dither);
>>
>> -       intel_wait_for_vblank(dev, pipe);
>> -
>
> I guess this hunk could go into a separate commit.

My way of thinking is that since the pipe is disabled there's no
reason to wait for vblank here.

>
> --
> Damien
Lespiau, Damien Oct. 5, 2012, 1:15 p.m. UTC | #3 
On Fri, Oct 5, 2012 at 1:53 PM, Paulo Zanoni <przanoni@gmail.com> wrote:
> 2012/10/4 Lespiau, Damien <damien.lespiau@intel.com>:
>> On Tue, Oct 2, 2012 at 9:51 PM, Paulo Zanoni <przanoni@gmail.com> wrote:
>>> @@ -5356,8 +5361,6 @@ static int haswell_crtc_mode_set(struct drm_crtc *crtc,
>>>
>>>         haswell_set_pipeconf(crtc, adjusted_mode, dither);
>>>
>>> -       intel_wait_for_vblank(dev, pipe);
>>> -
>>
>> I guess this hunk could go into a separate commit.
>
> My way of thinking is that since the pipe is disabled there's no
> reason to wait for vblank here.

Oh, sure I was just saying that it could deserve a separate commit
from the one adding the warning, but bikeshedding really.
diff mbox

Patch

diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index a6562a8..5080b53 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -5216,6 +5216,11 @@  static int haswell_crtc_mode_set(struct drm_crtc *crtc,
 	WARN(num_connectors != 1, "%d connectors attached to pipe %c\n",
 	     num_connectors, pipe_name(pipe));
 
+	WARN_ON(I915_READ(PIPECONF(pipe)) &
+		(PIPECONF_ENABLE | I965_PIPECONF_ACTIVE));
+
+	WARN_ON(I915_READ(DSPCNTR(plane)) & DISPLAY_PLANE_ENABLE);
+
 	if (!intel_ddi_pll_mode_set(crtc, adjusted_mode->clock))
 		return -EINVAL;
 
@@ -5356,8 +5361,6 @@  static int haswell_crtc_mode_set(struct drm_crtc *crtc,
 
 	haswell_set_pipeconf(crtc, adjusted_mode, dither);
 
-	intel_wait_for_vblank(dev, pipe);
-
 	/* Set up the display plane register */
 	I915_WRITE(DSPCNTR(plane), DISPPLANE_GAMMA_ENABLE);
 	POSTING_READ(DSPCNTR(plane));