From patchwork Tue Oct 2 20:52:00 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Paulo Zanoni X-Patchwork-Id: 1538961 Return-Path: X-Original-To: patchwork-intel-gfx@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork1.kernel.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by patchwork1.kernel.org (Postfix) with ESMTP id DACEA3FDAE for ; Tue, 2 Oct 2012 21:05:31 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id E79C19E8CE for ; Tue, 2 Oct 2012 14:05:31 -0700 (PDT) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mail-gh0-f177.google.com (mail-gh0-f177.google.com [209.85.160.177]) by gabe.freedesktop.org (Postfix) with ESMTP id 126629EF60 for ; Tue, 2 Oct 2012 13:53:38 -0700 (PDT) Received: by mail-gh0-f177.google.com with SMTP id f20so1791743ghb.36 for ; Tue, 02 Oct 2012 13:53:38 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=from:to:cc:subject:date:message-id:x-mailer:in-reply-to:references; bh=kMEUiOcWed4r6+VxGsBDqYEtZjoh2n9HHyJcvuDhfMg=; b=qaQ2eBKDJWkpNvjQYcbMMDOiByyxi9VCZogUGPtmRorkgSSwQgb7e4wcuaIwFgIQAV qQqGWEyd04mQwWSLgpaEbXg+Wou7+KjZ7raVqpE5i+FRGrCtyC1uUAKmmnbpyRnif1AX xxwDKQSpNzsw3CAdhuEAPIgX/bRFreKcaVCcpugDez2VJ3FPDqHVLcjmdxn4QWeXDRXt +jVk6OUmqw4kG0jtasmUTON1FZuf5NvEJM7rpQXYNc7+UU++C4TqpyKmArgzbvY4wWaB ycq65fU3BTXXszxK3I76MZezljqHIF1N7cXtuub9Y3sQANbYYnAO0QIhcjM887Cku+ya IhtQ== Received: by 10.236.151.103 with SMTP id a67mr19860744yhk.122.1349211218725; Tue, 02 Oct 2012 13:53:38 -0700 (PDT) Received: from vicky.domain.invalid ([187.59.149.118]) by mx.google.com with ESMTPS id f1sm2117168ank.12.2012.10.02.13.53.37 (version=TLSv1/SSLv3 cipher=OTHER); Tue, 02 Oct 2012 13:53:38 -0700 (PDT) From: Paulo Zanoni To: intel-gfx@lists.freedesktop.org Date: Tue, 2 Oct 2012 17:52:00 -0300 Message-Id: <1349211142-4802-26-git-send-email-przanoni@gmail.com> X-Mailer: git-send-email 1.7.10.4 In-Reply-To: <1349211142-4802-1-git-send-email-przanoni@gmail.com> References: <1349211142-4802-1-git-send-email-przanoni@gmail.com> Cc: Paulo Zanoni Subject: [Intel-gfx] [PATCH 25/47] drm/i915: add TRANSCODER_EDP X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.13 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: intel-gfx-bounces+patchwork-intel-gfx=patchwork.kernel.org@lists.freedesktop.org Errors-To: intel-gfx-bounces+patchwork-intel-gfx=patchwork.kernel.org@lists.freedesktop.org From: Paulo Zanoni Before Haswell we used to have 3 pipes (A, B and C) and 3 transcoders (A, B and C), and there was an 1:1 mapping on then. Because of this mapping, every register that was actually part of the transcoder was called PIPE_SOMETHING instead of TRANSCODER_SOMETHING and its definition used the PIPE macro. Starting from Haswell, we have 3 pipes (A, B and C) but 4 transcoders (A, B, C and EDP). Transcoder EDP can be connected to any of the 3 pipes, and as its name says, it is used by EDP. For now we're just creating the transcoder definitions and setting transcoder to TRANSCODER_EDP on DDI eDP code, but none of the registers was ported to use transcoder instead of pipe. Signed-off-by: Paulo Zanoni --- drivers/gpu/drm/i915/i915_drv.h | 8 ++++++++ drivers/gpu/drm/i915/i915_reg.h | 1 + drivers/gpu/drm/i915/intel_display.c | 20 ++++++++++++++++++++ drivers/gpu/drm/i915/intel_drv.h | 3 +++ 4 files changed, 32 insertions(+) diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h index fc3761e..14ba368 100644 --- a/drivers/gpu/drm/i915/i915_drv.h +++ b/drivers/gpu/drm/i915/i915_drv.h @@ -58,6 +58,14 @@ enum pipe { }; #define pipe_name(p) ((p) + 'A') +enum transcoder { + TRANSCODER_A = 0, + TRANSCODER_B, + TRANSCODER_C, + TRANSCODER_EDP = 0xF, +}; +#define transcoder_name(t) ((t) + 'A') + enum plane { PLANE_A = 0, PLANE_B, diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h index 982985c..de95698 100644 --- a/drivers/gpu/drm/i915/i915_reg.h +++ b/drivers/gpu/drm/i915/i915_reg.h @@ -26,6 +26,7 @@ #define _I915_REG_H_ #define _PIPE(pipe, a, b) ((a) + (pipe)*((b)-(a))) +#define _TRANSCODER(tran, a, b) ((a) + (tran)*((b)-(a))) #define _PORT(port, a, b) ((a) + (port)*((b)-(a))) diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c index a83cd99..0fccbe6 100644 --- a/drivers/gpu/drm/i915/intel_display.c +++ b/drivers/gpu/drm/i915/intel_display.c @@ -927,6 +927,15 @@ intel_vlv_find_best_pll(const intel_limit_t *limit, struct drm_crtc *crtc, return true; } +enum transcoder pipe_to_transcoder(struct drm_i915_private *dev_priv, + enum pipe pipe) +{ + struct drm_crtc *crtc = dev_priv->pipe_to_crtc_mapping[pipe]; + struct intel_crtc *intel_crtc = to_intel_crtc(crtc); + + return intel_crtc->transcoder; +} + static void ironlake_wait_for_vblank(struct drm_device *dev, int pipe) { struct drm_i915_private *dev_priv = dev->dev_private; @@ -3336,6 +3345,9 @@ static void ironlake_crtc_off(struct drm_crtc *crtc) static void haswell_crtc_off(struct drm_crtc *crtc) { + struct intel_crtc *intel_crtc = to_intel_crtc(crtc); + + intel_crtc->transcoder = intel_crtc->pipe; intel_ddi_put_crtc_pll(crtc); } @@ -5184,6 +5196,7 @@ static int haswell_crtc_mode_set(struct drm_crtc *crtc, struct intel_crtc *intel_crtc = to_intel_crtc(crtc); int pipe = intel_crtc->pipe; int plane = intel_crtc->plane; + enum transcoder transcoder; int num_connectors = 0; intel_clock_t clock, reduced_clock; u32 dpll = 0, fp = 0, fp2 = 0; @@ -5212,6 +5225,12 @@ static int haswell_crtc_mode_set(struct drm_crtc *crtc, num_connectors++; } + if (is_cpu_edp) + transcoder = TRANSCODER_EDP; + else + transcoder = pipe; + intel_crtc->transcoder = transcoder; + WARN(!HAS_PCH_LPT(dev), "Unexpected PCH type %d\n", INTEL_PCH_TYPE(dev)); @@ -7769,6 +7788,7 @@ static void intel_crtc_init(struct drm_device *dev, int pipe) /* Swap pipes & planes for FBC on pre-965 */ intel_crtc->pipe = pipe; intel_crtc->plane = pipe; + intel_crtc->transcoder = pipe; if (IS_MOBILE(dev) && IS_GEN3(dev)) { DRM_DEBUG_KMS("swapping pipes & planes for FBC\n"); intel_crtc->plane = !pipe; diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h index 95cbd67..ca06ebb 100644 --- a/drivers/gpu/drm/i915/intel_drv.h +++ b/drivers/gpu/drm/i915/intel_drv.h @@ -185,6 +185,7 @@ struct intel_crtc { struct drm_crtc base; enum pipe pipe; enum plane plane; + enum transcoder transcoder; u8 lut_r[256], lut_g[256], lut_b[256]; /* * Whether the crtc and the connected output pipeline is active. Implies @@ -491,6 +492,8 @@ extern struct drm_display_mode *intel_crtc_mode_get(struct drm_device *dev, struct drm_crtc *crtc); int intel_get_pipe_from_crtc_id(struct drm_device *dev, void *data, struct drm_file *file_priv); +extern enum transcoder pipe_to_transcoder(struct drm_i915_private *dev_priv, + enum pipe pipe); extern void intel_wait_for_vblank(struct drm_device *dev, int pipe); extern void intel_wait_for_pipe_off(struct drm_device *dev, int pipe);