From patchwork Sun Oct 7 06:38:09 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mario Kleiner X-Patchwork-Id: 1560591 Return-Path: X-Original-To: patchwork-intel-gfx@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork1.kernel.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by patchwork1.kernel.org (Postfix) with ESMTP id 184473FC1A for ; Sun, 7 Oct 2012 06:40:09 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id DB29E9E872 for ; Sat, 6 Oct 2012 23:40:08 -0700 (PDT) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mx2.mpg.de (mx2.mpg.de [134.76.10.35]) by gabe.freedesktop.org (Postfix) with ESMTP id 5101C9E970 for ; Sat, 6 Oct 2012 23:39:16 -0700 (PDT) X-IronPort-Reputation-Score: None X-IronPort-AV: E=McAfee;i="5400,1158,6857"; a="61128719" X-IronPort-AV: E=Sophos;i="4.80,547,1344204000"; d="scan'208";a="61128719" Received: from smtp-out.tuebingen.mpg.de (HELO tuebingen.mpg.de) ([192.124.26.249]) by mailer2.mpg.de with ESMTP; 07 Oct 2012 08:39:15 +0200 Received: from [10.38.134.15] (account mario.kleiner@tuebingen.mpg.de HELO fir.kyb.local) by tuebingen.mpg.de (CommuniGate Pro SMTP 5.4.2) with ESMTPA id 20975509; Sun, 07 Oct 2012 08:39:15 +0200 From: Mario Kleiner To: intel-gfx@lists.freedesktop.org Date: Sun, 7 Oct 2012 08:38:09 +0200 Message-Id: <1349591890-13732-3-git-send-email-mario.kleiner@tuebingen.mpg.de> X-Mailer: git-send-email 1.7.10.4 In-Reply-To: <1349591890-13732-1-git-send-email-mario.kleiner@tuebingen.mpg.de> References: <1349591890-13732-1-git-send-email-mario.kleiner@tuebingen.mpg.de> Cc: daniel.vetter@ffwll.ch, Mario Kleiner Subject: [Intel-gfx] [PATCH 2/3] ddx/dri2: Repair broken pageflip swap scheduling. X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.13 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: intel-gfx-bounces+patchwork-intel-gfx=patchwork.kernel.org@lists.freedesktop.org Errors-To: intel-gfx-bounces+patchwork-intel-gfx=patchwork.kernel.org@lists.freedesktop.org Commit 7538be3315b8683b05e8f6b22023baadcc0bc4da together with DRI2/OpenGL triple-buffering support added an optimization which breaks kms pageflip swap scheduling for most meaningful use cases and thereby violates the OML_sync_control, GLX_SGI_swap_control, GLX_swap_control and MESA_swap_control specs, except for the trivial case of a glXSwapBuffers call with swap_interval == 1. This small modification allows to keep the optimization in the intended way, while removing the hilarious side effects for timing sensitive applications. Signed-off-by: Mario Kleiner --- src/intel_dri.c | 22 +++++++++++++++++++--- 1 file changed, 19 insertions(+), 3 deletions(-) diff --git a/src/intel_dri.c b/src/intel_dri.c index 126acb2..8786bf4 100644 --- a/src/intel_dri.c +++ b/src/intel_dri.c @@ -1275,9 +1275,6 @@ I830DRI2ScheduleSwap(ClientPtr client, DrawablePtr draw, DRI2BufferPtr front, * the swap. */ if (divisor == 0 || current_msc < *target_msc) { - if (flip && I830DRI2ScheduleFlip(intel, draw, swap_info)) - return TRUE; - vbl.request.type = DRM_VBLANK_ABSOLUTE | DRM_VBLANK_EVENT | pipe_select(pipe); @@ -1295,6 +1292,25 @@ I830DRI2ScheduleSwap(ClientPtr client, DrawablePtr draw, DRI2BufferPtr front, if (current_msc >= *target_msc) *target_msc = current_msc; + /* If pageflip is requested for the next possible vblank, + * then avoid the roundtrip to the kernels vblank event + * delivery and schedule the pageflip for next vblank + * directly. This can't be done for any other case, as + * it would violate the OML_sync_control spec and + * SGI/MESA/GLX_swap_control spec! + */ + if (flip && (current_msc == *target_msc) && + I830DRI2ScheduleFlip(intel, draw, swap_info)) { + /* Create approximate target vblank of flip-completion, + * so basic consistency checks and swap_interval still + * work correctly. + */ + *target_msc += flip; + swap_info->frame = *target_msc; + + return TRUE; + } + vbl.request.sequence = *target_msc; vbl.request.signal = (unsigned long)swap_info; ret = drmWaitVBlank(intel->drmSubFD, &vbl);