From patchwork Wed Oct 24 13:31:59 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Paulo Zanoni X-Patchwork-Id: 1638421 Return-Path: X-Original-To: patchwork-intel-gfx@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork2.kernel.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by patchwork2.kernel.org (Postfix) with ESMTP id 4D0FEDF2AB for ; Wed, 24 Oct 2012 13:32:21 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 82C7DA0275 for ; Wed, 24 Oct 2012 06:32:20 -0700 (PDT) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mail-ye0-f177.google.com (mail-ye0-f177.google.com [209.85.213.177]) by gabe.freedesktop.org (Postfix) with ESMTP id 77A0F9E74B for ; Wed, 24 Oct 2012 06:32:10 -0700 (PDT) Received: by mail-ye0-f177.google.com with SMTP id r1so51538yen.36 for ; Wed, 24 Oct 2012 06:32:10 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=from:to:cc:subject:date:message-id:x-mailer:in-reply-to:references; bh=HovDoSTp3oecel2CrrbNamSHGgKCpmPrnaQwWH/JGmE=; b=zfWCIKLDCtMwCA2K807ssd9ZexkIcA1O7cnbvPeE8dovoSa1fy4QjEHGPFgQiftxq0 JfE8dZLw+Yxc0n5BZZ8xjHirFL+t8mowJYq7r1DiIHTxdCQaUA+XPV/uwnauiqVfKn3N SEMzaUwrQ55onGpOTCwrLNKcqgctotmtRidHLPlkfYjaSRN9roFdrOSEdoKDEcjWXmSr NyqMU8Ft/X8uySj26dL6rhV8Z4WfzA4Y3Ume+XwrjDps4LPSzNpHHYVJQQvFqMsG4KOf E1QJ2OGoy6Jmlu0edaL1HtvNojaSJDShxgbJwNjJFJ4NPDG9ULNM2gLoIhFK4NVFUIIc NI8A== Received: by 10.101.11.20 with SMTP id o20mr1590968ani.41.1351085529939; Wed, 24 Oct 2012 06:32:09 -0700 (PDT) Received: from vicky.domain.invalid ([177.42.14.236]) by mx.google.com with ESMTPS id u13sm13278467anl.5.2012.10.24.06.32.08 (version=TLSv1/SSLv3 cipher=OTHER); Wed, 24 Oct 2012 06:32:09 -0700 (PDT) From: Paulo Zanoni To: intel-gfx@lists.freedesktop.org Date: Wed, 24 Oct 2012 11:31:59 -0200 Message-Id: <1351085520-3572-1-git-send-email-przanoni@gmail.com> X-Mailer: git-send-email 1.7.10.4 In-Reply-To: <1351024208-3489-1-git-send-email-przanoni@gmail.com> References: <1351024208-3489-1-git-send-email-przanoni@gmail.com> Cc: Paulo Zanoni Subject: [Intel-gfx] [PATCH 02-1/18] drm/i915: fix checks inside ironlake_crtc_{enable, disable} X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.13 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: intel-gfx-bounces+patchwork-intel-gfx=patchwork.kernel.org@lists.freedesktop.org Errors-To: intel-gfx-bounces+patchwork-intel-gfx=patchwork.kernel.org@lists.freedesktop.org From: Paulo Zanoni The last commit forked a Haswell version, so now we remove Haswell code from these functions. Signed-off-by: Paulo Zanoni Reviewed-by: Jani Nikula --- drivers/gpu/drm/i915/intel_display.c | 14 -------------- 1 file changed, 14 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c index eb4dba6..e5dc22c 100644 --- a/drivers/gpu/drm/i915/intel_display.c +++ b/drivers/gpu/drm/i915/intel_display.c @@ -3228,9 +3228,6 @@ static void ironlake_crtc_enable(struct drm_crtc *crtc) if (encoder->pre_enable) encoder->pre_enable(encoder); - if (IS_HASWELL(dev)) - intel_ddi_enable_pipe_clock(intel_crtc); - /* Enable panel fitting for LVDS */ if (dev_priv->pch_pf_size && (intel_pipe_has_type(crtc, INTEL_OUTPUT_LVDS) || HAS_eDP)) { @@ -3249,11 +3246,6 @@ static void ironlake_crtc_enable(struct drm_crtc *crtc) */ intel_crtc_load_lut(crtc); - if (IS_HASWELL(dev)) { - intel_ddi_set_pipe_settings(crtc); - intel_ddi_enable_pipe_func(crtc); - } - intel_enable_pipe(dev_priv, pipe, is_pch_port); intel_enable_plane(dev_priv, plane, pipe); @@ -3404,16 +3396,10 @@ static void ironlake_crtc_disable(struct drm_crtc *crtc) intel_disable_pipe(dev_priv, pipe); - if (IS_HASWELL(dev)) - intel_ddi_disable_pipe_func(dev_priv, pipe); - /* Disable PF */ I915_WRITE(PF_CTL(pipe), 0); I915_WRITE(PF_WIN_SZ(pipe), 0); - if (IS_HASWELL(dev)) - intel_ddi_disable_pipe_clock(intel_crtc); - for_each_encoder_on_crtc(dev, crtc, encoder) if (encoder->post_disable) encoder->post_disable(encoder);