From patchwork Fri Oct 26 08:58:18 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Daniel Vetter X-Patchwork-Id: 1650741 Return-Path: X-Original-To: patchwork-intel-gfx@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork1.kernel.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by patchwork1.kernel.org (Postfix) with ESMTP id 4D3E53FD4E for ; Fri, 26 Oct 2012 09:53:24 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 25C849E9FB for ; Fri, 26 Oct 2012 02:53:24 -0700 (PDT) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mail-wg0-f43.google.com (mail-wg0-f43.google.com [74.125.82.43]) by gabe.freedesktop.org (Postfix) with ESMTP id EB6BD9E92C for ; Fri, 26 Oct 2012 01:58:32 -0700 (PDT) Received: by mail-wg0-f43.google.com with SMTP id dq11so1626593wgb.12 for ; Fri, 26 Oct 2012 01:58:31 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ffwll.ch; s=google; h=from:to:cc:subject:date:message-id:x-mailer:in-reply-to:references; bh=2KmOv0SgqaVLZFx5IzHWTeP54fbKXqazam6SFAKcdag=; b=VMvpiNbSEMzekO+zU7XoN7HRS/fskQtImeMHeVZM1SDq3OSF5WGAq9uYeH8x8bzrm1 x2T/hhCCJCzprXpEokWdqjr+8gD4u1vWSQmv35EKJmFfBfL6sNRDMlZY/SoM/W4t67Nh H6A+3QJkltQOpwnPVryEZYEpD+C65/jhwClys= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20120113; h=from:to:cc:subject:date:message-id:x-mailer:in-reply-to:references :x-gm-message-state; bh=2KmOv0SgqaVLZFx5IzHWTeP54fbKXqazam6SFAKcdag=; b=oIpaBTNKUSPBzYqsGYkZZNYO1X34o4Qm4+NoFksWSVrrlYkIEVca3XFtqUR6ze2Njs o/8GGeYNSH+WV/zQeowkUja2jq0CTy663QTuwbjywarw3UUwhG7k//6/rPdHA9ZMWTbR jHmnBE9YvIOK4AlHunW+WXzBn7oziuwi+lYk3TL6LMT9Oxh+TPYohAt93nciqFeJ7Ev5 SjlrxUNNRzGs7j/o6e3ypLlPNYJm67LGo1mGGBKjXs3B4oElwaaTIXLWBsLX6jHf9Zql 3iWh2CL4afteVXLD6EJOj2N6DmPhe8mJXDiaoBJUPPuFFQVZv7FkYSKjQJFBu4OlRHFk Y/4g== Received: by 10.180.82.35 with SMTP id f3mr3666032wiy.6.1351241911617; Fri, 26 Oct 2012 01:58:31 -0700 (PDT) Received: from bremse.ffwll.local (178-83-130-250.dynamic.hispeed.ch. [178.83.130.250]) by mx.google.com with ESMTPS id k20sm14217364wiv.11.2012.10.26.01.58.30 (version=TLSv1/SSLv3 cipher=OTHER); Fri, 26 Oct 2012 01:58:31 -0700 (PDT) From: Daniel Vetter To: Intel Graphics Development Date: Fri, 26 Oct 2012 10:58:18 +0200 Message-Id: <1351241899-7870-9-git-send-email-daniel.vetter@ffwll.ch> X-Mailer: git-send-email 1.7.11.4 In-Reply-To: <1351241899-7870-1-git-send-email-daniel.vetter@ffwll.ch> References: <1351241899-7870-1-git-send-email-daniel.vetter@ffwll.ch> X-Gm-Message-State: ALoCoQmaMzd3QQOTUBdlT2wmTxJBze913dpadsOkvxxo7I5RQnhIVlqvqbVhEu9TXYacVGoMfb3+ Cc: Daniel Vetter Subject: [Intel-gfx] [PATCH 8/9] drm/i915: add ->display.modeset_global_resources callback X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.13 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: intel-gfx-bounces+patchwork-intel-gfx=patchwork.kernel.org@lists.freedesktop.org Errors-To: intel-gfx-bounces+patchwork-intel-gfx=patchwork.kernel.org@lists.freedesktop.org After all relevant pipes are disabled and after we've updated all the state with the staged state, but before we call the per-crtc ->mode_set functions there's a very natural point to set up any shared/global resources like - shared plls (obviously only the setup, the enabling needs to be separately handling with a separate refcount) - global watermark state like the DSPARB on gmch platforms - workaround bits that depend upon the exact global output configuration - enabling the right set of refclocks - enabling/disabling manual power wells. Now for a lot of these things we can't move them into this function yet, most often because we only compute the required information in the per-crtc ->mode_set callback. Which is too late. But due to a bunch of reasons (check-only atomic modeset, fastboot&hw state checks, ...) we need to separate the computation of that state from the actual hw frobbery anyway. So we can move things into this new callback step- by-step. Others can't be moved here (or implemented at all) because our code lacks the smarts to properly update them. E.g. the DSPARB can only be updated when all pipes are disabled, so if we decide to change it's value, we need to disable _all_ pipes. The infrastructure for that is already in place (with the various pipe masks that driver the modeset logic). But again we need to move a few things out of ->mode_set first before we can even implement the correct decision making. In any case, we need to start somewhere, so let's start with the callback: Some small follow-up patches will make immediate good use of it. Signed-off-by: Daniel Vetter Reviewed-by: Paulo Zanoni --- drivers/gpu/drm/i915/i915_drv.h | 1 + drivers/gpu/drm/i915/intel_display.c | 3 +++ 2 files changed, 4 insertions(+) diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h index b0ca786..6531d3e 100644 --- a/drivers/gpu/drm/i915/i915_drv.h +++ b/drivers/gpu/drm/i915/i915_drv.h @@ -249,6 +249,7 @@ struct drm_i915_display_funcs { uint32_t sprite_width, int pixel_size); void (*update_linetime_wm)(struct drm_device *dev, int pipe, struct drm_display_mode *mode); + void (*modeset_global_resources)(struct drm_device *dev); int (*crtc_mode_set)(struct drm_crtc *crtc, struct drm_display_mode *mode, struct drm_display_mode *adjusted_mode, diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c index 7a9cfc2..7009c0f 100644 --- a/drivers/gpu/drm/i915/intel_display.c +++ b/drivers/gpu/drm/i915/intel_display.c @@ -7403,6 +7403,9 @@ bool intel_set_mode(struct drm_crtc *crtc, * update the the output configuration. */ intel_modeset_update_state(dev, prepare_pipes); + if (dev_priv->display.modeset_global_resources) + dev_priv->display.modeset_global_resources(dev); + /* Set up the DPLL and any encoders state that needs to adjust or depend * on the DPLL. */