From patchwork Mon Jan 7 19:47:38 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Imre Deak X-Patchwork-Id: 1942431 Return-Path: X-Original-To: patchwork-intel-gfx@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork2.kernel.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by patchwork2.kernel.org (Postfix) with ESMTP id 3CBA9DF215 for ; Mon, 7 Jan 2013 19:51:57 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 35D1EE5EEF for ; Mon, 7 Jan 2013 11:51:57 -0800 (PST) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mga14.intel.com (mga14.intel.com [143.182.124.37]) by gabe.freedesktop.org (Postfix) with ESMTP id 45877E631C for ; Mon, 7 Jan 2013 11:48:14 -0800 (PST) Received: from azsmga002.ch.intel.com ([10.2.17.35]) by azsmga102.ch.intel.com with ESMTP; 07 Jan 2013 11:48:03 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="4.84,425,1355126400"; d="scan'208";a="188595346" Received: from unknown (HELO localhost) ([10.252.123.53]) by AZSMGA002.ch.intel.com with ESMTP; 07 Jan 2013 11:48:02 -0800 From: Imre Deak To: intel-gfx@lists.freedesktop.org Date: Mon, 7 Jan 2013 21:47:38 +0200 Message-Id: <1357588059-6631-7-git-send-email-imre.deak@intel.com> X-Mailer: git-send-email 1.7.10.4 In-Reply-To: <1357588059-6631-1-git-send-email-imre.deak@intel.com> References: <1357588059-6631-1-git-send-email-imre.deak@intel.com> In-Reply-To: <1357317721-6313-1-git-send-email-imre.deak@intel.com> References: <1357317721-6313-1-git-send-email-imre.deak@intel.com> Subject: [Intel-gfx] [PATCH v2 6/7] drm/i915: check tile object alignment explicitly X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.13 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: intel-gfx-bounces+patchwork-intel-gfx=patchwork.kernel.org@lists.freedesktop.org Errors-To: intel-gfx-bounces+patchwork-intel-gfx=patchwork.kernel.org@lists.freedesktop.org So far we used the object size for alignment check, since this matched the actual alignment requirement. An upcoming patch will introduce linear and physical fenced sizes making this connection less clear, so use instead the get-alignment function explicitly. Signed-off-by: Imre Deak --- drivers/gpu/drm/i915/i915_gem_tiling.c | 6 +++++- 1 file changed, 5 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/i915_gem_tiling.c b/drivers/gpu/drm/i915/i915_gem_tiling.c index 1a03e41..6d69d06 100644 --- a/drivers/gpu/drm/i915/i915_gem_tiling.c +++ b/drivers/gpu/drm/i915/i915_gem_tiling.c @@ -256,6 +256,7 @@ static bool i915_gem_object_fence_ok(struct drm_i915_gem_object *obj, int tiling_mode) { u32 size; + u32 align; if (tiling_mode == I915_TILING_NONE) return true; @@ -275,7 +276,10 @@ i915_gem_object_fence_ok(struct drm_i915_gem_object *obj, int tiling_mode) if (obj->gtt_space->size != size) return false; - if (obj->gtt_offset & (size - 1)) + align = i915_gem_get_gtt_alignment(obj->base.dev, obj->base.size, + tiling_mode, true); + + if (obj->gtt_offset & (align - 1)) return false; return true;