From patchwork Fri Jan 11 19:57:52 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Rodrigo Vivi X-Patchwork-Id: 1967201 Return-Path: X-Original-To: patchwork-intel-gfx@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork2.kernel.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by patchwork2.kernel.org (Postfix) with ESMTP id 3ACC9DF2A2 for ; Fri, 11 Jan 2013 20:11:27 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 38AD443747 for ; Fri, 11 Jan 2013 12:11:27 -0800 (PST) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mail-yh0-f43.google.com (mail-yh0-f43.google.com [209.85.213.43]) by gabe.freedesktop.org (Postfix) with ESMTP id CF7D6E5C33 for ; Fri, 11 Jan 2013 12:11:18 -0800 (PST) Received: by mail-yh0-f43.google.com with SMTP id 27so415152yhr.30 for ; Fri, 11 Jan 2013 12:11:18 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=x-received:from:to:cc:subject:date:message-id:x-mailer:in-reply-to :references; bh=odlUeLhvD2tsDP2IbTM4yPStKAGymrYHB6mhQ4UbjO4=; b=e2xlI7Bws/thCdDYW8ZPxXqWu/3KW8fk0ufDyjHvTtXSZAyjb2FcRS96Fgs35YZRIi yPJXq089n1UinaHWt0ICLVaXxE4iJxe02P4iAm7FPo2pvU00OmRgD+ewGwq+Bo9sTD2b ZZDOetvyVRG77hD7+jo2V0T3f09QzsXG9X6teR6XSxpJj0uzYSoWcvAFIaze0XNjjDZu AUqUG8C+0eEEdkhi+ifIDme54dFiqH0s/GU+pzZJph73hxso008l0vqJ1yMO/vxbROTt X4hoVIN1FRZqd0yYiY8PMSgVleeUO0HcOk3SHFMDpFlDTX0F4KUi+9J7V2vsYv5xKjeE z46w== X-Received: by 10.101.142.34 with SMTP id u34mr24788769ann.7.1357935078025; Fri, 11 Jan 2013 12:11:18 -0800 (PST) Received: from localhost.localdomain ([189.0.16.214]) by mx.google.com with ESMTPS id y17sm4630713ang.12.2013.01.11.12.06.56 (version=TLSv1 cipher=RC4-SHA bits=128/128); Fri, 11 Jan 2013 12:11:17 -0800 (PST) From: Rodrigo Vivi To: intel-gfx@lists.freedesktop.org Date: Fri, 11 Jan 2013 17:57:52 -0200 Message-Id: <1357934277-3300-4-git-send-email-rodrigo.vivi@gmail.com> X-Mailer: git-send-email 1.7.11.7 In-Reply-To: <1357934277-3300-1-git-send-email-rodrigo.vivi@gmail.com> References: <1357934277-3300-1-git-send-email-rodrigo.vivi@gmail.com> Subject: [Intel-gfx] [PATCH 3/8] drm/i915: Read the EDP DPCD and PSR Capability X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.13 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: intel-gfx-bounces+patchwork-intel-gfx=patchwork.kernel.org@lists.freedesktop.org Errors-To: intel-gfx-bounces+patchwork-intel-gfx=patchwork.kernel.org@lists.freedesktop.org From: Shobhit Kumar Signed-off-by: Shobhit Kumar v2: reuse of just created is_edp_psr and put it at right place. Signed-off-by: Rodrigo Vivi --- drivers/gpu/drm/i915/intel_dp.c | 12 ++++++++++++ drivers/gpu/drm/i915/intel_drv.h | 1 + include/drm/drm_dp_helper.h | 1 + 3 files changed, 14 insertions(+) diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c index 1dd89d5..f0224f8 100644 --- a/drivers/gpu/drm/i915/intel_dp.c +++ b/drivers/gpu/drm/i915/intel_dp.c @@ -1418,6 +1418,11 @@ static void intel_post_disable_dp(struct intel_encoder *encoder) } } +static bool is_edp_psr(struct intel_dp *intel_dp) +{ + return (is_edp(intel_dp) && (intel_dp->psr_dpcd[0] & 0x1)); +} + static void intel_enable_dp(struct intel_encoder *encoder) { struct intel_dp *intel_dp = enc_to_intel_dp(&encoder->base); @@ -2094,6 +2099,13 @@ intel_dp_get_dpcd(struct intel_dp *intel_dp) if (intel_dp->dpcd[DP_DPCD_REV] == 0) return false; /* DPCD not present */ + /* Check if the panel supports PSR */ + memset(intel_dp->psr_dpcd, 0, EDP_PSR_RECEIVER_CAP_SIZE); + intel_dp_aux_native_read_retry(intel_dp, DP_PSR_SUPPORT, + intel_dp->psr_dpcd, + sizeof(intel_dp->psr_dpcd)); + if (is_edp_psr(intel_dp)) + DRM_DEBUG_KMS("Detected EDP PSR Panel.\n"); if (!(intel_dp->dpcd[DP_DOWNSTREAMPORT_PRESENT] & DP_DWN_STRM_PORT_PRESENT)) return true; /* native DP sink */ diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h index 9799fe9..82a85ad 100644 --- a/drivers/gpu/drm/i915/intel_drv.h +++ b/drivers/gpu/drm/i915/intel_drv.h @@ -360,6 +360,7 @@ struct intel_dp { uint8_t link_bw; uint8_t lane_count; uint8_t dpcd[DP_RECEIVER_CAP_SIZE]; + uint8_t psr_dpcd[EDP_PSR_RECEIVER_CAP_SIZE]; uint8_t downstream_ports[DP_MAX_DOWNSTREAM_PORTS]; struct i2c_adapter adapter; struct i2c_algo_dp_aux_data algo; diff --git a/include/drm/drm_dp_helper.h b/include/drm/drm_dp_helper.h index c09d367..32eeb92 100644 --- a/include/drm/drm_dp_helper.h +++ b/include/drm/drm_dp_helper.h @@ -335,6 +335,7 @@ u8 drm_dp_get_adjust_request_pre_emphasis(u8 link_status[DP_LINK_STATUS_SIZE], int lane); #define DP_RECEIVER_CAP_SIZE 0xf +#define EDP_PSR_RECEIVER_CAP_SIZE 2 void drm_dp_link_train_clock_recovery_delay(u8 dpcd[DP_RECEIVER_CAP_SIZE]); void drm_dp_link_train_channel_eq_delay(u8 dpcd[DP_RECEIVER_CAP_SIZE]);