@@ -1241,9 +1241,18 @@ struct drm_i915_gem_request {
/** GEM sequence number associated with this request. */
uint32_t seqno;
- /** Postion in the ringbuffer of the end of the request */
+ /** Position in the ringbuffer of the start of the request */
+ u32 head;
+
+ /** Position in the ringbuffer of the end of the request */
u32 tail;
+ /** Batch buffer related to this request if any */
+ struct drm_i915_gem_object *batch_obj;
+
+ /** Context related to this request */
+ struct i915_hw_context *ctx;
+
/** Time at which this request was emitted, in jiffies. */
unsigned long emitted_jiffies;
@@ -1635,7 +1644,9 @@ int __must_check i915_gpu_idle(struct drm_device *dev);
int __must_check i915_gem_idle(struct drm_device *dev);
int i915_add_request(struct intel_ring_buffer *ring,
struct drm_file *file,
- u32 *seqno);
+ u32 *seqno,
+ struct drm_i915_gem_object *batch_obj,
+ struct i915_hw_context *ctx);
int __must_check i915_wait_seqno(struct intel_ring_buffer *ring,
uint32_t seqno);
int i915_gem_fault(struct vm_area_struct *vma, struct vm_fault *vmf);
@@ -967,7 +967,7 @@ i915_gem_check_olr(struct intel_ring_buffer *ring, u32 seqno)
ret = 0;
if (seqno == ring->outstanding_lazy_request)
- ret = i915_add_request(ring, NULL, NULL);
+ ret = i915_add_request(ring, NULL, NULL, NULL, NULL);
return ret;
}
@@ -1990,14 +1990,17 @@ i915_gem_get_seqno(struct drm_device *dev, u32 *seqno)
int
i915_add_request(struct intel_ring_buffer *ring,
struct drm_file *file,
- u32 *out_seqno)
+ u32 *out_seqno,
+ struct drm_i915_gem_object *obj,
+ struct i915_hw_context *ctx)
{
drm_i915_private_t *dev_priv = ring->dev->dev_private;
struct drm_i915_gem_request *request;
- u32 request_ring_position;
+ u32 request_ring_position, request_start;
int was_empty;
int ret;
+ request_start = intel_ring_get_tail(ring);
/*
* Emit any outstanding flushes - execbuf can fail to emit the flush
* after having emitted the batchbuffer command. Hence we need to fix
@@ -2029,7 +2032,10 @@ i915_add_request(struct intel_ring_buffer *ring,
request->seqno = intel_ring_get_seqno(ring);
request->ring = ring;
+ request->head = request_start;
request->tail = request_ring_position;
+ request->batch_obj = obj;
+ request->ctx = ctx;
request->emitted_jiffies = jiffies;
was_empty = list_empty(&ring->request_list);
list_add_tail(&request->list, &ring->request_list);
@@ -2255,7 +2261,7 @@ i915_gem_retire_work_handler(struct work_struct *work)
idle = true;
for_each_ring(ring, dev_priv, i) {
if (ring->gpu_caches_dirty)
- i915_add_request(ring, NULL, NULL);
+ i915_add_request(ring, NULL, NULL, NULL, NULL);
idle &= list_empty(&ring->request_list);
}
@@ -768,13 +768,15 @@ i915_gem_execbuffer_move_to_active(struct list_head *objects,
static void
i915_gem_execbuffer_retire_commands(struct drm_device *dev,
struct drm_file *file,
- struct intel_ring_buffer *ring)
+ struct intel_ring_buffer *ring,
+ struct drm_i915_gem_object *obj,
+ struct i915_hw_context *ctx)
{
/* Unconditionally force add_request to emit a full flush. */
ring->gpu_caches_dirty = true;
/* Add a breadcrumb for the completion of the batch buffer */
- (void)i915_add_request(ring, file, NULL);
+ (void)i915_add_request(ring, file, NULL, obj, ctx);
}
static int
@@ -812,6 +814,7 @@ i915_gem_do_execbuffer(struct drm_device *dev, void *data,
struct eb_objects *eb;
struct drm_i915_gem_object *batch_obj;
struct drm_clip_rect *cliprects = NULL;
+ struct i915_hw_context *ctx = NULL;
struct intel_ring_buffer *ring;
u32 ctx_id = i915_execbuffer2_get_context_id(*args);
u32 exec_start, exec_len;
@@ -1047,7 +1050,7 @@ i915_gem_do_execbuffer(struct drm_device *dev, void *data,
trace_i915_gem_ring_dispatch(ring, intel_ring_get_seqno(ring), flags);
i915_gem_execbuffer_move_to_active(&eb->objects, ring);
- i915_gem_execbuffer_retire_commands(dev, file, ring);
+ i915_gem_execbuffer_retire_commands(dev, file, ring, batch_obj, ctx);
err:
eb_destroy(eb);
@@ -217,7 +217,7 @@ static int intel_overlay_do_wait_request(struct intel_overlay *overlay,
int ret;
BUG_ON(overlay->last_flip_req);
- ret = i915_add_request(ring, NULL, &overlay->last_flip_req);
+ ret = i915_add_request(ring, NULL, &overlay->last_flip_req, NULL, NULL);
if (ret)
return ret;
@@ -286,7 +286,8 @@ static int intel_overlay_continue(struct intel_overlay *overlay,
intel_ring_emit(ring, flip_addr);
intel_ring_advance(ring);
- return i915_add_request(ring, NULL, &overlay->last_flip_req);
+ return i915_add_request(ring, NULL, &overlay->last_flip_req,
+ NULL, NULL);
}
static void intel_overlay_release_old_vid_tail(struct intel_overlay *overlay)
@@ -1407,7 +1407,7 @@ int intel_ring_idle(struct intel_ring_buffer *ring)
/* We need to add any requests required to flush the objects and ring */
if (ring->outstanding_lazy_request) {
- ret = i915_add_request(ring, NULL, NULL);
+ ret = i915_add_request(ring, NULL, NULL, NULL, NULL);
if (ret)
return ret;
}
In order to track down a batch buffer and context which caused the ring to hang, store reference to bo and context into the request struct. Request can also cause gpu to hang after the batch in the flush section in the ring. To detect this add start of the flush portion offset into the request. Signed-off-by: Mika Kuoppala <mika.kuoppala@intel.com> --- drivers/gpu/drm/i915/i915_drv.h | 15 +++++++++++++-- drivers/gpu/drm/i915/i915_gem.c | 14 ++++++++++---- drivers/gpu/drm/i915/i915_gem_execbuffer.c | 9 ++++++--- drivers/gpu/drm/i915/intel_overlay.c | 5 +++-- drivers/gpu/drm/i915/intel_ringbuffer.c | 2 +- 5 files changed, 33 insertions(+), 12 deletions(-)