From patchwork Mon Feb 4 15:27:43 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Lespiau, Damien" X-Patchwork-Id: 2093131 Return-Path: X-Original-To: patchwork-intel-gfx@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork2.kernel.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by patchwork2.kernel.org (Postfix) with ESMTP id 69B28DFE82 for ; Mon, 4 Feb 2013 15:52:51 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 478ECE612F for ; Mon, 4 Feb 2013 07:52:51 -0800 (PST) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mga02.intel.com (mga02.intel.com [134.134.136.20]) by gabe.freedesktop.org (Postfix) with ESMTP id E8161E5EA1 for ; Mon, 4 Feb 2013 07:29:42 -0800 (PST) Received: from orsmga001.jf.intel.com ([10.7.209.18]) by orsmga101.jf.intel.com with ESMTP; 04 Feb 2013 07:29:42 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="4.84,600,1355126400"; d="scan'208";a="257442005" Received: from unknown (HELO dyon.amr.corp.intel.com) ([10.255.12.132]) by orsmga001.jf.intel.com with ESMTP; 04 Feb 2013 07:29:41 -0800 From: Damien Lespiau To: intel-gfx@lists.freedesktop.org Date: Mon, 4 Feb 2013 15:27:43 +0000 Message-Id: <1359991705-5254-49-git-send-email-damien.lespiau@intel.com> X-Mailer: git-send-email 1.7.7.5 In-Reply-To: <1359991705-5254-1-git-send-email-damien.lespiau@intel.com> References: <1359991705-5254-1-git-send-email-damien.lespiau@intel.com> Subject: [Intel-gfx] [PATCH 48/90] assembler: Get rid of src operand's swizzle_set X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.13 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: intel-gfx-bounces+patchwork-intel-gfx=patchwork.kernel.org@lists.freedesktop.org Errors-To: intel-gfx-bounces+patchwork-intel-gfx=patchwork.kernel.org@lists.freedesktop.org swizzle_set can be derived from the value of swizzle itself, no need for that field. Signed-off-by: Damien Lespiau --- assembler/gen4asm.h | 1 - assembler/gram.y | 14 ++++---------- 2 files changed, 4 insertions(+), 11 deletions(-) diff --git a/assembler/gen4asm.h b/assembler/gen4asm.h index 0048b4a..b4ea647 100644 --- a/assembler/gen4asm.h +++ b/assembler/gen4asm.h @@ -96,7 +96,6 @@ struct src_operand { int address_mode; /* 0 if direct, 1 if register-indirect */ int indirect_offset; /* XXX */ - int swizzle_set; unsigned swizzle: 8; uint32_t imm32; /* set if reg_file == BRW_IMMEDIATE_VALUE or it is expressing a branch offset */ diff --git a/assembler/gram.y b/assembler/gram.y index a10198b..c1029fa 100644 --- a/assembler/gram.y +++ b/assembler/gram.y @@ -1891,7 +1891,6 @@ directsrcoperand: negate abs symbol_reg region regtype $$.default_region = $4.is_default; $$.negate = $1; $$.abs = $2; - $$.swizzle_set = $6.swizzle_set; $$.swizzle = $6.swizzle; } | srcarchoperandex @@ -1911,7 +1910,6 @@ indirectsrcoperand: $$.horiz_stride = $4.horiz_stride; $$.negate = $1; $$.abs = $2; - $$.swizzle_set = $6.swizzle_set; $$.swizzle = $6.swizzle; } ; @@ -2389,17 +2387,14 @@ srcimmtype: /* empty */ */ swizzle: /* empty */ { - $$.swizzle_set = 0; $$.swizzle = BRW_SWIZZLE_NOOP; } | DOT chansel { - $$.swizzle_set = 1; $$.swizzle = BRW_SWIZZLE4($2, $2, $2, $2); } | DOT chansel chansel chansel chansel { - $$.swizzle_set = 1; $$.swizzle = BRW_SWIZZLE4($2, $3, $4, $5); } ; @@ -2875,7 +2870,7 @@ int set_instruction_src0(struct brw_instruction *instr, instr->bits2.da1.src0_negate = src->negate; instr->bits2.da1.src0_abs = src->abs; instr->bits2.da1.src0_address_mode = src->address_mode; - if (src->swizzle_set) { + if (src->swizzle && src->swizzle != BRW_SWIZZLE_NOOP) { fprintf(stderr, "error: swizzle bits set in align1 " "instruction\n"); return 1; @@ -2902,7 +2897,7 @@ int set_instruction_src0(struct brw_instruction *instr, instr->bits2.ia1.src0_horiz_stride = src->horiz_stride; instr->bits2.ia1.src0_width = src->width; instr->bits2.ia1.src0_vert_stride = src->vert_stride; - if (src->swizzle_set) { + if (src->swizzle && src->swizzle != BRW_SWIZZLE_NOOP) { fprintf(stderr, "error: swizzle bits set in align1 " "instruction\n"); return 1; @@ -2953,7 +2948,7 @@ int set_instruction_src1(struct brw_instruction *instr, return 1; } */ - if (src->swizzle_set) { + if (src->swizzle && src->swizzle != BRW_SWIZZLE_NOOP) { fprintf(stderr, "error: swizzle bits set in align1 " "instruction\n"); return 1; @@ -2985,7 +2980,7 @@ int set_instruction_src1(struct brw_instruction *instr, instr->bits3.ia1.src1_horiz_stride = src->horiz_stride; instr->bits3.ia1.src1_width = src->width; instr->bits3.ia1.src1_vert_stride = src->vert_stride; - if (src->swizzle_set) { + if (src->swizzle && src->swizzle != BRW_SWIZZLE_NOOP) { fprintf(stderr, "error: swizzle bits set in align1 " "instruction\n"); return 1; @@ -3121,6 +3116,5 @@ void set_direct_src_operand(struct src_operand *src, struct brw_reg *reg, src->horiz_stride = 0; src->negate = 0; src->abs = 0; - src->swizzle_set = 0; src->swizzle = BRW_SWIZZLE_NOOP; }