From patchwork Tue Mar 5 18:09:37 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Patrik Jakobsson X-Patchwork-Id: 2221151 Return-Path: X-Original-To: patchwork-intel-gfx@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork1.kernel.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by patchwork1.kernel.org (Postfix) with ESMTP id C94D33FCF6 for ; Tue, 5 Mar 2013 18:11:29 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id DFDA1E60F7 for ; Tue, 5 Mar 2013 10:11:29 -0800 (PST) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mail-lb0-f178.google.com (mail-lb0-f178.google.com [209.85.217.178]) by gabe.freedesktop.org (Postfix) with ESMTP id 96EB4E623E for ; Tue, 5 Mar 2013 10:10:51 -0800 (PST) Received: by mail-lb0-f178.google.com with SMTP id n1so4931079lba.23 for ; Tue, 05 Mar 2013 10:10:50 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=x-received:from:to:cc:subject:date:message-id:x-mailer:mime-version :content-type:content-transfer-encoding; bh=DSuBCpb1SMct4u05e4f6U4hCUOddLB5esa8+yotA7AE=; b=H/uovoS5MBTNQIWbQ3KMdRa3ru3ayOfoVkYuNifK36dfRsOl0rU/v18WbO9Su+SKEE /cR3hPnXDtY/OVMJCr06oK41k569qe0AI3SzjfGxTn6kSsAg6sSA+/swnp9t4l9Zzmxm 24h12GAgRntdj25PIVnbN3OdP/R59a0Evw2H+TltNcpZKj0OrwDR3n65HKjJN6rdDQ41 UL8WxtFBWmh1Cts+E8Mou61Rf+OMZsLfJ6GT9F2JmNG6EQrzQkJRAHmPgdUbrkaBHJ4F f0+FBlhslylY7v/tGwZX/rY4bguXl5cgIu4/hHhibXWNTAutxUsTtjAVVtbIhpF8AESN InnA== X-Received: by 10.112.88.10 with SMTP id bc10mr6306294lbb.70.1362507050054; Tue, 05 Mar 2013 10:10:50 -0800 (PST) Received: from patrik-macbook.lan (h138n8-oer-a32.ias.bredband.telia.com. [2.248.103.138]) by mx.google.com with ESMTPS id fm8sm8847120lbb.17.2013.03.05.10.10.48 (version=TLSv1.1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Tue, 05 Mar 2013 10:10:49 -0800 (PST) From: Patrik Jakobsson To: intel-gfx@lists.freedesktop.org Date: Tue, 5 Mar 2013 19:09:37 +0100 Message-Id: <1362506977-2089-1-git-send-email-patrik.r.jakobsson@gmail.com> X-Mailer: git-send-email 1.7.10.4 MIME-Version: 1.0 Subject: [Intel-gfx] [PATCH] drm/i915: Fix incorrect definition of ADPA HSYNC and VSYNC bits X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.13 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: intel-gfx-bounces+patchwork-intel-gfx=patchwork.kernel.org@lists.freedesktop.org Errors-To: intel-gfx-bounces+patchwork-intel-gfx=patchwork.kernel.org@lists.freedesktop.org Disable bits for ADPA HSYNC and VSYNC where mixed up resulting in suspend becoming standby and vice versa. Fixed by swapping their bit position. Reported-by: Ville Syrjälä Signed-off-by: Patrik Jakobsson Reviewed-by: Eric Anholt --- drivers/gpu/drm/i915/i915_reg.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h index 527b664..848992f 100644 --- a/drivers/gpu/drm/i915/i915_reg.h +++ b/drivers/gpu/drm/i915/i915_reg.h @@ -1613,9 +1613,9 @@ #define ADPA_CRT_HOTPLUG_FORCE_TRIGGER (1<<16) #define ADPA_USE_VGA_HVPOLARITY (1<<15) #define ADPA_SETS_HVPOLARITY 0 -#define ADPA_VSYNC_CNTL_DISABLE (1<<11) +#define ADPA_VSYNC_CNTL_DISABLE (1<<10) #define ADPA_VSYNC_CNTL_ENABLE 0 -#define ADPA_HSYNC_CNTL_DISABLE (1<<10) +#define ADPA_HSYNC_CNTL_DISABLE (1<<11) #define ADPA_HSYNC_CNTL_ENABLE 0 #define ADPA_VSYNC_ACTIVE_HIGH (1<<4) #define ADPA_VSYNC_ACTIVE_LOW 0