| Message ID | 1363102348-16337-3-git-send-email-tiwai@suse.de (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
On Tue, Mar 12, 2013 at 04:32:28PM +0100, Takashi Iwai wrote: > The eDP output on HP Z1 is still broken when X is started even after > fixing the infinite link-train loop. The regression was introduced in > 3.6 kernel for cleaning up the mode clock handling code in intel_dp.c. > > In the past, the clock of the reference mode was modified in > intel_dp_mode_fixup() in the case of eDP fixed clock, and this clock was > used for calculating in intel_dp_set_m_n(). This override was removed, > thus the wrong mode clock is used for the calculation, resulting in a > psychedelic smoking output in the end. > > This patch corrects the clock to be used in the place. > > Cc: <stable@vger.kernel.org> > Signed-off-by: Takashi Iwai <tiwai@suse.de> I truly hate this mess of dotclock vs portclock vs. whatever. Can you pls apply a little bikeshed and use the existing intel_edp_target_clock like in ironlake_set_m_n? And if you have the regressing commit a little citation to assign the blame (it's probably me) would be good. Thanks, Daniel
diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c index 7d250aa..ddbf50f 100644 --- a/drivers/gpu/drm/i915/intel_dp.c +++ b/drivers/gpu/drm/i915/intel_dp.c @@ -819,6 +819,7 @@ intel_dp_set_m_n(struct drm_crtc *crtc, struct drm_display_mode *mode, struct intel_link_m_n m_n; int pipe = intel_crtc->pipe; enum transcoder cpu_transcoder = intel_crtc->cpu_transcoder; + int pixel_clock = mode->clock; /* * Find the lane count in the intel_encoder private @@ -826,6 +827,13 @@ intel_dp_set_m_n(struct drm_crtc *crtc, struct drm_display_mode *mode, for_each_encoder_on_crtc(dev, crtc, intel_encoder) { intel_dp = enc_to_intel_dp(&intel_encoder->base); + if (intel_encoder->type == INTEL_OUTPUT_EDP) { + struct drm_display_mode *fixed_mode = + intel_dp->attached_connector->panel.fixed_mode; + if (fixed_mode) + pixel_clock = fixed_mode->clock; + } + if (intel_encoder->type == INTEL_OUTPUT_DISPLAYPORT || intel_encoder->type == INTEL_OUTPUT_EDP) { @@ -840,7 +848,7 @@ intel_dp_set_m_n(struct drm_crtc *crtc, struct drm_display_mode *mode, * set up for 8-bits of R/G/B, or 3 bytes total. */ intel_link_compute_m_n(intel_crtc->bpp, lane_count, - mode->clock, adjusted_mode->clock, &m_n); + pixel_clock, adjusted_mode->clock, &m_n); if (IS_HASWELL(dev)) { I915_WRITE(PIPE_DATA_M1(cpu_transcoder),
The eDP output on HP Z1 is still broken when X is started even after fixing the infinite link-train loop. The regression was introduced in 3.6 kernel for cleaning up the mode clock handling code in intel_dp.c. In the past, the clock of the reference mode was modified in intel_dp_mode_fixup() in the case of eDP fixed clock, and this clock was used for calculating in intel_dp_set_m_n(). This override was removed, thus the wrong mode clock is used for the calculation, resulting in a psychedelic smoking output in the end. This patch corrects the clock to be used in the place. Cc: <stable@vger.kernel.org> Signed-off-by: Takashi Iwai <tiwai@suse.de> --- drivers/gpu/drm/i915/intel_dp.c | 10 +++++++++- 1 file changed, 9 insertions(+), 1 deletion(-)