From patchwork Wed Apr 3 18:06:30 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ben Widawsky X-Patchwork-Id: 2388851 Return-Path: X-Original-To: patchwork-intel-gfx@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork1.kernel.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by patchwork1.kernel.org (Postfix) with ESMTP id C219C3FD8C for ; Wed, 3 Apr 2013 18:04:43 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id AC469E5F21 for ; Wed, 3 Apr 2013 11:04:43 -0700 (PDT) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from shiva.localdomain (209-20-75-48.static.cloud-ips.com [209.20.75.48]) by gabe.freedesktop.org (Postfix) with ESMTP id 436B8E5CDD for ; Wed, 3 Apr 2013 11:04:34 -0700 (PDT) Received: by shiva.localdomain (Postfix, from userid 1005) id 61DCF88627; Wed, 3 Apr 2013 18:04:33 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.2 (2011-06-06) on shiva.chad-versace.us X-Spam-Level: X-Spam-Status: No, score=-2.9 required=5.0 tests=ALL_TRUSTED,BAYES_00, URIBL_BLOCKED autolearn=unavailable version=3.3.2 Received: from lundgren.nims.intel.com (jfdmzpr04-ext.jf.intel.com [134.134.137.73]) by shiva.localdomain (Postfix) with ESMTPSA id 8572688013; Wed, 3 Apr 2013 18:04:32 +0000 (UTC) From: Ben Widawsky To: intel-gfx@lists.freedesktop.org Date: Wed, 3 Apr 2013 11:06:30 -0700 Message-Id: <1365012390-6465-1-git-send-email-ben@bwidawsk.net> X-Mailer: git-send-email 1.8.2 Cc: Ben Widawsky Subject: [Intel-gfx] [PATCH] drm/i915: Don't override PPGTT cacheability on HSW X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.13 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: intel-gfx-bounces+patchwork-intel-gfx=patchwork.kernel.org@lists.freedesktop.org Errors-To: intel-gfx-bounces+patchwork-intel-gfx=patchwork.kernel.org@lists.freedesktop.org Apparently these ECOCHK bits changed on HSW and the behavior is not what we want. I've not been able to find VLV definition specifically so I'll assume it's the same as IVB. (Only compile tested) Reported-by: Kenneth Graunke Signed-off-by: Ben Widawsky --- drivers/gpu/drm/i915/i915_gem_gtt.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c b/drivers/gpu/drm/i915/i915_gem_gtt.c index 4cbae7b..01cf805 100644 --- a/drivers/gpu/drm/i915/i915_gem_gtt.c +++ b/drivers/gpu/drm/i915/i915_gem_gtt.c @@ -322,11 +322,11 @@ void i915_gem_init_ppgtt(struct drm_device *dev) I915_WRITE(GAM_ECOCHK, ecochk | ECOCHK_SNB_BIT | ECOCHK_PPGTT_CACHE64B); I915_WRITE(GFX_MODE, _MASKED_BIT_ENABLE(GFX_PPGTT_ENABLE)); - } else if (INTEL_INFO(dev)->gen >= 7) { + } else if (INTEL_INFO(dev)->gen >= 7 && !IS_HASWELL(dev)) { I915_WRITE(GAM_ECOCHK, ECOCHK_PPGTT_CACHE64B); - /* GFX_MODE is per-ring on gen7+ */ } + /* GFX_MODE is per-ring on gen7+ */ for_each_ring(ring, dev_priv, i) { if (INTEL_INFO(dev)->gen >= 7) I915_WRITE(RING_MODE_GEN7(ring),