quick_dump: Add dpio read

Message ID	1366178965-12229-1-git-send-email-ben@bwidawsk.net (mailing list archive)
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Headers	show Return-Path: <intel-gfx-bounces+patchwork-intel-gfx=patchwork.kernel.org@lists.freedesktop.org> From: Ben Widawsky <ben@bwidawsk.net> To: intel-gfx@lists.freedesktop.org Date: Tue, 16 Apr 2013 23:09:25 -0700 Message-Id: <1366178965-12229-1-git-send-email-ben@bwidawsk.net> Cc: Ben Widawsky <ben@bwidawsk.net> Subject: [Intel-gfx] [PATCH] quick_dump: Add dpio read Precedence: list MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: intel-gfx-bounces+patchwork-intel-gfx=patchwork.kernel.org@lists.freedesktop.org Errors-To: intel-gfx-bounces+patchwork-intel-gfx=patchwork.kernel.org@lists.freedesktop.org

Message ID

1366178965-12229-1-git-send-email-ben@bwidawsk.net (mailing list archive)

State

New, archived

Headers

From: Ben Widawsky <ben@bwidawsk.net>
To: intel-gfx@lists.freedesktop.org
Date: Tue, 16 Apr 2013 23:09:25 -0700
Message-Id: <1366178965-12229-1-git-send-email-ben@bwidawsk.net>
Cc: Ben Widawsky <ben@bwidawsk.net>
Subject: [Intel-gfx] [PATCH] quick_dump: Add dpio read
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Errors-To: intel-gfx-bounces+patchwork-intel-gfx=patchwork.kernel.org@lists.freedesktop.org

Commit Message

Ben Widawsky April 17, 2013, 6:09 a.m. UTC

The sample usage is in reg_access.dpio_read(). We should add some
semantics to the text files to detect DPIO registers, and do the right
thing.

Cc: Jesse Barnes <jbarnes@virtuousgeek.org>
Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
---
 tools/quick_dump/Makefile.am   | 3 ++-
 tools/quick_dump/chipset.i     | 2 ++
 tools/quick_dump/reg_access.py | 6 ++++++
 3 files changed, 10 insertions(+), 1 deletion(-)

Comments

Jesse Barnes April 17, 2013, 3:49 p.m. UTC | #1

On Tue, 16 Apr 2013 23:09:25 -0700
Ben Widawsky <ben@bwidawsk.net> wrote:

> The sample usage is in reg_access.dpio_read(). We should add some
> semantics to the text files to detect DPIO registers, and do the right
> thing.
> 
> Cc: Jesse Barnes <jbarnes@virtuousgeek.org>
> Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
> ---
>  tools/quick_dump/Makefile.am   | 3 ++-
>  tools/quick_dump/chipset.i     | 2 ++
>  tools/quick_dump/reg_access.py | 6 ++++++
>  3 files changed, 10 insertions(+), 1 deletion(-)
> 
> diff --git a/tools/quick_dump/Makefile.am b/tools/quick_dump/Makefile.am
> index 42ab140..afd6814 100644
> --- a/tools/quick_dump/Makefile.am
> +++ b/tools/quick_dump/Makefile.am
> @@ -11,7 +11,8 @@ I915ChipsetPython_la_SOURCES = chipset_wrap_python.c intel_chipset.c \
>  			       $(top_srcdir)/lib/intel_drm.c  \
>  			       $(top_srcdir)/lib/intel_pci.c  \
>  			       $(top_srcdir)/lib/intel_reg_map.c  \
> -			       $(top_srcdir)/lib/intel_mmio.c
> +			       $(top_srcdir)/lib/intel_mmio.c  \
> +			       $(top_srcdir)/lib/intel_dpio.c
>  
>  chipset_wrap_python.c chipset.py: chipset.i
>  	$(SWIG) $(AX_SWIG_PYTHON_OPT) -I/usr/include -I$(top_srcdir)/lib -o $@ $<
> diff --git a/tools/quick_dump/chipset.i b/tools/quick_dump/chipset.i
> index 36e7f4c..0a15d38 100644
> --- a/tools/quick_dump/chipset.i
> +++ b/tools/quick_dump/chipset.i
> @@ -14,6 +14,7 @@ extern uint32_t intel_register_write(uint32_t reg, uint32_t val);
>  extern void intel_register_access_fini();
>  extern int intel_register_access_needs_wake();
>  extern unsigned short pcidev_to_devid(struct pci_device *pci_dev);
> +extern uint32_t intel_dpio_reg_read(uint32_t reg);
>  %}
>  
>  extern int is_sandybridge(unsigned short pciid);
> @@ -26,3 +27,4 @@ extern uint32_t intel_register_write(uint32_t reg, uint32_t val);
>  extern void intel_register_access_fini();
>  extern int intel_register_access_needs_wake();
>  extern unsigned short pcidev_to_devid(struct pci_device *pci_dev);
> +extern uint32_t intel_dpio_reg_read(uint32_t reg);
> diff --git a/tools/quick_dump/reg_access.py b/tools/quick_dump/reg_access.py
> index b7f3100..e2a0a95 100755
> --- a/tools/quick_dump/reg_access.py
> +++ b/tools/quick_dump/reg_access.py
> @@ -27,6 +27,12 @@ def get_wake():
>  	mt_forcewake_get()
>  	vlv_forcewake_get()
>  
> +def dpio_read(reg):
> +	reg = int(reg, 16)
> +	val = chipset.intel_dpio_reg_read(reg)
> +	return val
> +
> +
>  def init():
>  	pci_dev = chipset.intel_get_pci_device()
>  	ret = chipset.intel_register_access_init(pci_dev, 0)

Looks good, thanks.

Reviewed-by: Jesse Barnes <jbarnes@virtuousgeek.org>

Daniel Vetter April 17, 2013, 5:03 p.m. UTC | #2

On Wed, Apr 17, 2013 at 08:49:51AM -0700, Jesse Barnes wrote:
> On Tue, 16 Apr 2013 23:09:25 -0700
> Ben Widawsky <ben@bwidawsk.net> wrote:
> 
> > The sample usage is in reg_access.dpio_read(). We should add some
> > semantics to the text files to detect DPIO registers, and do the right
> > thing.
> > 
> > Cc: Jesse Barnes <jbarnes@virtuousgeek.org>
> > Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
> > ---
> >  tools/quick_dump/Makefile.am   | 3 ++-
> >  tools/quick_dump/chipset.i     | 2 ++
> >  tools/quick_dump/reg_access.py | 6 ++++++
> >  3 files changed, 10 insertions(+), 1 deletion(-)
> > 
> > diff --git a/tools/quick_dump/Makefile.am b/tools/quick_dump/Makefile.am
> > index 42ab140..afd6814 100644
> > --- a/tools/quick_dump/Makefile.am
> > +++ b/tools/quick_dump/Makefile.am
> > @@ -11,7 +11,8 @@ I915ChipsetPython_la_SOURCES = chipset_wrap_python.c intel_chipset.c \
> >  			       $(top_srcdir)/lib/intel_drm.c  \
> >  			       $(top_srcdir)/lib/intel_pci.c  \
> >  			       $(top_srcdir)/lib/intel_reg_map.c  \
> > -			       $(top_srcdir)/lib/intel_mmio.c
> > +			       $(top_srcdir)/lib/intel_mmio.c  \
> > +			       $(top_srcdir)/lib/intel_dpio.c
> >  
> >  chipset_wrap_python.c chipset.py: chipset.i
> >  	$(SWIG) $(AX_SWIG_PYTHON_OPT) -I/usr/include -I$(top_srcdir)/lib -o $@ $<
> > diff --git a/tools/quick_dump/chipset.i b/tools/quick_dump/chipset.i
> > index 36e7f4c..0a15d38 100644
> > --- a/tools/quick_dump/chipset.i
> > +++ b/tools/quick_dump/chipset.i
> > @@ -14,6 +14,7 @@ extern uint32_t intel_register_write(uint32_t reg, uint32_t val);
> >  extern void intel_register_access_fini();
> >  extern int intel_register_access_needs_wake();
> >  extern unsigned short pcidev_to_devid(struct pci_device *pci_dev);
> > +extern uint32_t intel_dpio_reg_read(uint32_t reg);
> >  %}
> >  
> >  extern int is_sandybridge(unsigned short pciid);
> > @@ -26,3 +27,4 @@ extern uint32_t intel_register_write(uint32_t reg, uint32_t val);
> >  extern void intel_register_access_fini();
> >  extern int intel_register_access_needs_wake();
> >  extern unsigned short pcidev_to_devid(struct pci_device *pci_dev);
> > +extern uint32_t intel_dpio_reg_read(uint32_t reg);
> > diff --git a/tools/quick_dump/reg_access.py b/tools/quick_dump/reg_access.py
> > index b7f3100..e2a0a95 100755
> > --- a/tools/quick_dump/reg_access.py
> > +++ b/tools/quick_dump/reg_access.py
> > @@ -27,6 +27,12 @@ def get_wake():
> >  	mt_forcewake_get()
> >  	vlv_forcewake_get()
> >  
> > +def dpio_read(reg):
> > +	reg = int(reg, 16)
> > +	val = chipset.intel_dpio_reg_read(reg)
> > +	return val
> > +
> > +
> >  def init():
> >  	pci_dev = chipset.intel_get_pci_device()
> >  	ret = chipset.intel_register_access_init(pci_dev, 0)
> 
> Looks good, thanks.
> 
> Reviewed-by: Jesse Barnes <jbarnes@virtuousgeek.org>

Applied, thanks.
-Daniel

diff --git a/tools/quick_dump/Makefile.am b/tools/quick_dump/Makefile.am
index 42ab140..afd6814 100644
--- a/tools/quick_dump/Makefile.am
+++ b/tools/quick_dump/Makefile.am
@@ -11,7 +11,8 @@  I915ChipsetPython_la_SOURCES = chipset_wrap_python.c intel_chipset.c \
 			       $(top_srcdir)/lib/intel_drm.c  \
 			       $(top_srcdir)/lib/intel_pci.c  \
 			       $(top_srcdir)/lib/intel_reg_map.c  \
-			       $(top_srcdir)/lib/intel_mmio.c
+			       $(top_srcdir)/lib/intel_mmio.c  \
+			       $(top_srcdir)/lib/intel_dpio.c
 
 chipset_wrap_python.c chipset.py: chipset.i
 	$(SWIG) $(AX_SWIG_PYTHON_OPT) -I/usr/include -I$(top_srcdir)/lib -o $@ $<
diff --git a/tools/quick_dump/chipset.i b/tools/quick_dump/chipset.i
index 36e7f4c..0a15d38 100644
--- a/tools/quick_dump/chipset.i
+++ b/tools/quick_dump/chipset.i
@@ -14,6 +14,7 @@  extern uint32_t intel_register_write(uint32_t reg, uint32_t val);
 extern void intel_register_access_fini();
 extern int intel_register_access_needs_wake();
 extern unsigned short pcidev_to_devid(struct pci_device *pci_dev);
+extern uint32_t intel_dpio_reg_read(uint32_t reg);
 %}
 
 extern int is_sandybridge(unsigned short pciid);
@@ -26,3 +27,4 @@  extern uint32_t intel_register_write(uint32_t reg, uint32_t val);
 extern void intel_register_access_fini();
 extern int intel_register_access_needs_wake();
 extern unsigned short pcidev_to_devid(struct pci_device *pci_dev);
+extern uint32_t intel_dpio_reg_read(uint32_t reg);
diff --git a/tools/quick_dump/reg_access.py b/tools/quick_dump/reg_access.py
index b7f3100..e2a0a95 100755
--- a/tools/quick_dump/reg_access.py
+++ b/tools/quick_dump/reg_access.py
@@ -27,6 +27,12 @@  def get_wake():
 	mt_forcewake_get()
 	vlv_forcewake_get()
 
+def dpio_read(reg):
+	reg = int(reg, 16)
+	val = chipset.intel_dpio_reg_read(reg)
+	return val
+
+
 def init():
 	pci_dev = chipset.intel_get_pci_device()
 	ret = chipset.intel_register_access_init(pci_dev, 0)

quick_dump: Add dpio read

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