From patchwork Tue Jun 11 22:49:27 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?St=C3=A9phane_Marchesin?= X-Patchwork-Id: 2707351 Return-Path: X-Original-To: patchwork-intel-gfx@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork2.web.kernel.org (Postfix) with ESMTP id BA85FC1459 for ; Tue, 11 Jun 2013 22:50:37 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id BCC6820399 for ; Tue, 11 Jun 2013 22:50:32 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by mail.kernel.org (Postfix) with ESMTP id 14AC920387 for ; Tue, 11 Jun 2013 22:50:28 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 0959BE62BA for ; Tue, 11 Jun 2013 15:50:28 -0700 (PDT) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mail-pd0-f175.google.com (mail-pd0-f175.google.com [209.85.192.175]) by gabe.freedesktop.org (Postfix) with ESMTP id 8C809E6268 for ; Tue, 11 Jun 2013 15:49:43 -0700 (PDT) Received: by mail-pd0-f175.google.com with SMTP id 4so9149597pdd.34 for ; Tue, 11 Jun 2013 15:49:43 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=chromium.org; s=google; h=from:to:cc:subject:date:message-id:x-mailer:in-reply-to:references :mime-version:content-type:content-transfer-encoding; bh=5eiTqdLSaP/dMGL4r/rcskpHsS/kBo8DIWs5Qf3gGxg=; b=c3JRnBL8BWLlJmkUAHYcKS24Z6Dziwv3mK+P1OqY/YiIWCE+L5Z2CnWZDRoKTRQtEc 9/o4eCvw9q/pbE/KIVeRKT3iA4wNjx5iPiILUe9WeRjwOsTlfSNa5hcdSlEy0yTJT/YP FGFFUs0iYD+i32SM1U8/so0RETTwJs+KXsJKE= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20120113; h=from:to:cc:subject:date:message-id:x-mailer:in-reply-to:references :mime-version:content-type:content-transfer-encoding :x-gm-message-state; bh=5eiTqdLSaP/dMGL4r/rcskpHsS/kBo8DIWs5Qf3gGxg=; b=V61nuuXK3fAMmt2gPC36yi1ZEjsgoPlLMHN1rM0vR/QIUD+7xPfpzmP9vhlqFPVYuA yM+mDNgOWN2e/HvN6Bj+YS0IrVo4x1K43zv662+t2tY10TxdetV6+dKHfaEEI+10JqJX quITkCHyEMZvACdCCmheVuunc/DBPbfNIc9FrHGqh2AcQLpoQLnjViLVSmjQkCDIAIlu x7QyGY8OtEdyHeWBv7Fk5of6L65ZtM4vNVxpmWLwTGyDmQeeVemJ4uZmexqMpgydAFX7 WfCAC+hfvVDR+HQuqJm/eCHQFT2klEjh497lXmbq5emopuYdRgFLLkmj4sL3s/9zmllF XEMQ== X-Received: by 10.68.178.1 with SMTP id cu1mr16549388pbc.208.1370990983409; Tue, 11 Jun 2013 15:49:43 -0700 (PDT) Received: from localhost ([2620:0:1000:1b01:82c1:6eff:fef8:b068]) by mx.google.com with ESMTPSA id cq1sm16378652pbc.13.2013.06.11.15.49.41 for (version=TLSv1.2 cipher=RC4-SHA bits=128/128); Tue, 11 Jun 2013 15:49:42 -0700 (PDT) From: =?UTF-8?q?St=C3=A9phane=20Marchesin?= To: intel-gfx@lists.freedesktop.org Date: Tue, 11 Jun 2013 15:49:27 -0700 Message-Id: <1370990967-22892-2-git-send-email-marcheu@chromium.org> X-Mailer: git-send-email 1.8.3 In-Reply-To: <1370990967-22892-1-git-send-email-marcheu@chromium.org> References: <1370990967-22892-1-git-send-email-marcheu@chromium.org> MIME-Version: 1.0 X-Gm-Message-State: ALoCoQlP8j/HxmgANGid4NFnKT5ruJUI8QE2/XtMidzl7tk6MZrWCIS4oLdeg65eijIWxhDhMqat Cc: daniel.vetter@ffwll.ch Subject: [Intel-gfx] [PATCH 2/2] drm/i915: repin bound framebuffers on resume X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.13 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: intel-gfx-bounces+patchwork-intel-gfx=patchwork.kernel.org@lists.freedesktop.org Errors-To: intel-gfx-bounces+patchwork-intel-gfx=patchwork.kernel.org@lists.freedesktop.org X-Spam-Status: No, score=-4.3 required=5.0 tests=BAYES_00,DKIM_SIGNED, RCVD_IN_DNSWL_MED,RP_MATCHES_RCVD,T_DKIM_INVALID,UNPARSEABLE_RELAY autolearn=ham version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP During suspend all fences are reset, including their pin_count which is reset to 0. However a framebuffer can be bound across suspend/resume, which means that when the buffer is unbound after resume, the pin count for the buffer will be negative. Since the fence pin count is now negative when available and zero when in use, the buffer's fence will get recycled when the fence is in use which is the opposite of what we want. The visible effect is that since the fence is recycled the tiling mode goes away while the buffer is being displayed and we get lines/screens of garbage. To fix this, we repin the fences for all bound fbs on resume, which ensures the pin count is right. Signed-off-by: Stéphane Marchesin --- drivers/gpu/drm/i915/i915_drv.c | 2 ++ drivers/gpu/drm/i915/intel_display.c | 32 ++++++++++++++++++++++++++++++++ drivers/gpu/drm/i915/intel_drv.h | 1 + 3 files changed, 35 insertions(+) diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c index a2e4953..b8e82ab 100644 --- a/drivers/gpu/drm/i915/i915_drv.c +++ b/drivers/gpu/drm/i915/i915_drv.c @@ -643,6 +643,8 @@ static int __i915_drm_thaw(struct drm_device *dev) /* We need working interrupts for modeset enabling ... */ drm_irq_install(dev); + /* Repin all live fences before resuming */ + intel_repin_fences(dev); intel_modeset_init_hw(dev); drm_modeset_lock_all(dev); diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c index 56746dc..4bf3240 100644 --- a/drivers/gpu/drm/i915/intel_display.c +++ b/drivers/gpu/drm/i915/intel_display.c @@ -2051,6 +2051,38 @@ void intel_unpin_fb_obj(struct drm_i915_gem_object *obj) i915_gem_object_unpin(obj); } +/* + * Repin the fences for all currently bound fbs. During suspend i915_drm_freeze + * calls i915_gem_reset, which in turn calls i915_gem_reset_fences, which + * resets the fence pin_counts to 0. So on resume we can call this function to + * restore the fences on bound framebuffers. + */ +void intel_repin_fences(struct drm_device *dev) +{ + struct drm_crtc *crtc; + struct drm_i915_gem_object *obj; + int ret; + + mutex_lock(&mode_config->mutex); + list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) { + if (!crtc || !crtc->fb) + continue; + obj = to_intel_framebuffer(crtc->fb)->obj; + if (!obj) + continue; + + /* Install a fence for tiled scan-out. */ + if (obj->tiling_mode != I915_TILING_NONE) { + ret = i915_gem_object_get_fence(obj); + if (ret) + DRM_ERROR("Couldn't get a fence\n"); + else + i915_gem_object_pin_fence(obj); + } + } + mutex_unlock(&mode_config->mutex); +} + /* Computes the linear offset to the base tile and adjusts x, y. bytes per pixel * is assumed to be a power-of-two. */ unsigned long intel_gen4_compute_page_offset(int *x, int *y, diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h index 624a9e6..b5395ed 100644 --- a/drivers/gpu/drm/i915/intel_drv.h +++ b/drivers/gpu/drm/i915/intel_drv.h @@ -630,6 +630,7 @@ extern int intel_pin_and_fence_fb_obj(struct drm_device *dev, struct drm_i915_gem_object *obj, struct intel_ring_buffer *pipelined); extern void intel_unpin_fb_obj(struct drm_i915_gem_object *obj); +extern void intel_repin_fences(struct drm_device *dev); extern int intel_framebuffer_init(struct drm_device *dev, struct intel_framebuffer *ifb,