From patchwork Tue Jun 18 20:32:53 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Eric Anholt X-Patchwork-Id: 2744981 Return-Path: X-Original-To: patchwork-intel-gfx@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 4AA9E9F39E for ; Tue, 18 Jun 2013 20:37:32 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 8163D20211 for ; Tue, 18 Jun 2013 20:37:30 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by mail.kernel.org (Postfix) with ESMTP id E46A52023E for ; Tue, 18 Jun 2013 20:37:28 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id CBADFE624F for ; Tue, 18 Jun 2013 13:37:28 -0700 (PDT) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from annarchy.freedesktop.org (annarchy.freedesktop.org [131.252.210.176]) by gabe.freedesktop.org (Postfix) with ESMTP id 15519E6238; Tue, 18 Jun 2013 13:33:04 -0700 (PDT) Received: from eliezer.anholt.net (annarchy.freedesktop.org [127.0.0.1]) by annarchy.freedesktop.org (Postfix) with ESMTP id 0748561339; Tue, 18 Jun 2013 13:33:04 -0700 (PDT) Received: by eliezer.anholt.net (Postfix, from userid 1000) id 36FDDE63449; Tue, 18 Jun 2013 13:32:57 -0700 (PDT) From: Eric Anholt To: intel-gfx@lists.freedesktop.org Date: Tue, 18 Jun 2013 13:32:53 -0700 Message-Id: <1371587577-10003-1-git-send-email-eric@anholt.net> X-Mailer: git-send-email 1.8.3.rc0 Subject: [Intel-gfx] [PATCH 1/5] intel: Stop storing two copies of the bo's gem handle. X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.13 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: intel-gfx-bounces+patchwork-intel-gfx=patchwork.kernel.org@lists.freedesktop.org Errors-To: intel-gfx-bounces+patchwork-intel-gfx=patchwork.kernel.org@lists.freedesktop.org X-Spam-Status: No, score=-5.4 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP --- intel/intel_bufmgr_gem.c | 91 +++++++++++++++++++++++------------------------- 1 file changed, 43 insertions(+), 48 deletions(-) diff --git a/intel/intel_bufmgr_gem.c b/intel/intel_bufmgr_gem.c index 3c73068..b06c99a 100644 --- a/intel/intel_bufmgr_gem.c +++ b/intel/intel_bufmgr_gem.c @@ -143,7 +143,6 @@ struct _drm_intel_bo_gem { drm_intel_bo bo; atomic_t refcount; - uint32_t gem_handle; const char *name; /** @@ -362,7 +361,7 @@ drm_intel_gem_dump_validation_list(drm_intel_bufmgr_gem *bufmgr_gem) drm_intel_bo_gem *bo_gem = (drm_intel_bo_gem *) bo; if (bo_gem->relocs == NULL) { - DBG("%2d: %d (%s)\n", i, bo_gem->gem_handle, + DBG("%2d: %d (%s)\n", i, bo_gem->bo.handle, bo_gem->name); continue; } @@ -375,9 +374,9 @@ drm_intel_gem_dump_validation_list(drm_intel_bufmgr_gem *bufmgr_gem) DBG("%2d: %d (%s)@0x%08llx -> " "%d (%s)@0x%08lx + 0x%08x\n", i, - bo_gem->gem_handle, bo_gem->name, + bo_gem->bo.handle, bo_gem->name, (unsigned long long)bo_gem->relocs[j].offset, - target_gem->gem_handle, + target_gem->bo.handle, target_gem->name, target_bo->offset, bo_gem->relocs[j].delta); @@ -430,7 +429,7 @@ drm_intel_add_validate_buffer(drm_intel_bo *bo) index = bufmgr_gem->exec_count; bo_gem->validate_index = index; /* Fill in array entry */ - bufmgr_gem->exec_objects[index].handle = bo_gem->gem_handle; + bufmgr_gem->exec_objects[index].handle = bo_gem->bo.handle; bufmgr_gem->exec_objects[index].relocation_count = bo_gem->reloc_count; bufmgr_gem->exec_objects[index].relocs_ptr = (uintptr_t) bo_gem->relocs; bufmgr_gem->exec_objects[index].alignment = 0; @@ -472,7 +471,7 @@ drm_intel_add_validate_buffer2(drm_intel_bo *bo, int need_fence) index = bufmgr_gem->exec_count; bo_gem->validate_index = index; /* Fill in array entry */ - bufmgr_gem->exec2_objects[index].handle = bo_gem->gem_handle; + bufmgr_gem->exec2_objects[index].handle = bo_gem->bo.handle; bufmgr_gem->exec2_objects[index].relocation_count = bo_gem->reloc_count; bufmgr_gem->exec2_objects[index].relocs_ptr = (uintptr_t)bo_gem->relocs; bufmgr_gem->exec2_objects[index].alignment = 0; @@ -565,7 +564,7 @@ drm_intel_gem_bo_busy(drm_intel_bo *bo) int ret; VG_CLEAR(busy); - busy.handle = bo_gem->gem_handle; + busy.handle = bo_gem->bo.handle; ret = drmIoctl(bufmgr_gem->fd, DRM_IOCTL_I915_GEM_BUSY, &busy); @@ -579,7 +578,7 @@ drm_intel_gem_bo_madvise_internal(drm_intel_bufmgr_gem *bufmgr_gem, struct drm_i915_gem_madvise madv; VG_CLEAR(madv); - madv.handle = bo_gem->gem_handle; + madv.handle = bo_gem->bo.handle; madv.madv = state; madv.retained = 1; drmIoctl(bufmgr_gem->fd, DRM_IOCTL_I915_GEM_MADVISE, &madv); @@ -713,8 +712,7 @@ retry: ret = drmIoctl(bufmgr_gem->fd, DRM_IOCTL_I915_GEM_CREATE, &create); - bo_gem->gem_handle = create.handle; - bo_gem->bo.handle = bo_gem->gem_handle; + bo_gem->bo.handle = create.handle; if (ret != 0) { free(bo_gem); return NULL; @@ -749,7 +747,7 @@ retry: drm_intel_bo_gem_set_in_aperture_size(bufmgr_gem, bo_gem); DBG("bo_create: buf %d (%s) %ldb\n", - bo_gem->gem_handle, bo_gem->name, size); + bo_gem->bo.handle, bo_gem->name, size); return &bo_gem->bo; } @@ -883,13 +881,12 @@ drm_intel_bo_gem_create_from_name(drm_intel_bufmgr *bufmgr, bo_gem->name = name; atomic_set(&bo_gem->refcount, 1); bo_gem->validate_index = -1; - bo_gem->gem_handle = open_arg.handle; bo_gem->bo.handle = open_arg.handle; bo_gem->global_name = handle; bo_gem->reusable = false; VG_CLEAR(get_tiling); - get_tiling.handle = bo_gem->gem_handle; + get_tiling.handle = bo_gem->bo.handle; ret = drmIoctl(bufmgr_gem->fd, DRM_IOCTL_I915_GEM_GET_TILING, &get_tiling); @@ -930,11 +927,11 @@ drm_intel_gem_bo_free(drm_intel_bo *bo) /* Close this object */ VG_CLEAR(close); - close.handle = bo_gem->gem_handle; + close.handle = bo_gem->bo.handle; ret = drmIoctl(bufmgr_gem->fd, DRM_IOCTL_GEM_CLOSE, &close); if (ret != 0) { DBG("DRM_IOCTL_GEM_CLOSE %d failed (%s): %s\n", - bo_gem->gem_handle, bo_gem->name, strerror(errno)); + bo_gem->bo.handle, bo_gem->name, strerror(errno)); } free(bo_gem->aub_annotations); free(bo); @@ -1065,7 +1062,7 @@ drm_intel_gem_bo_unreference_final(drm_intel_bo *bo, time_t time) bo_gem->used_as_reloc_target = false; DBG("bo_unreference final: %d (%s)\n", - bo_gem->gem_handle, bo_gem->name); + bo_gem->bo.handle, bo_gem->name); /* release memory associated with this object */ if (bo_gem->reloc_target_info) { @@ -1148,10 +1145,10 @@ static int drm_intel_gem_bo_map(drm_intel_bo *bo, int write_enable) struct drm_i915_gem_mmap mmap_arg; DBG("bo_map: %d (%s), map_count=%d\n", - bo_gem->gem_handle, bo_gem->name, bo_gem->map_count); + bo_gem->bo.handle, bo_gem->name, bo_gem->map_count); VG_CLEAR(mmap_arg); - mmap_arg.handle = bo_gem->gem_handle; + mmap_arg.handle = bo_gem->bo.handle; mmap_arg.offset = 0; mmap_arg.size = bo->size; ret = drmIoctl(bufmgr_gem->fd, @@ -1160,7 +1157,7 @@ static int drm_intel_gem_bo_map(drm_intel_bo *bo, int write_enable) if (ret != 0) { ret = -errno; DBG("%s:%d: Error mapping buffer %d (%s): %s .\n", - __FILE__, __LINE__, bo_gem->gem_handle, + __FILE__, __LINE__, bo_gem->bo.handle, bo_gem->name, strerror(errno)); if (--bo_gem->map_count == 0) drm_intel_gem_bo_close_vma(bufmgr_gem, bo_gem); @@ -1170,12 +1167,12 @@ static int drm_intel_gem_bo_map(drm_intel_bo *bo, int write_enable) VG(VALGRIND_MALLOCLIKE_BLOCK(mmap_arg.addr_ptr, mmap_arg.size, 0, 1)); bo_gem->mem_virtual = (void *)(uintptr_t) mmap_arg.addr_ptr; } - DBG("bo_map: %d (%s) -> %p\n", bo_gem->gem_handle, bo_gem->name, + DBG("bo_map: %d (%s) -> %p\n", bo_gem->bo.handle, bo_gem->name, bo_gem->mem_virtual); bo->virtual = bo_gem->mem_virtual; VG_CLEAR(set_domain); - set_domain.handle = bo_gem->gem_handle; + set_domain.handle = bo_gem->bo.handle; set_domain.read_domains = I915_GEM_DOMAIN_CPU; if (write_enable) set_domain.write_domain = I915_GEM_DOMAIN_CPU; @@ -1186,7 +1183,7 @@ static int drm_intel_gem_bo_map(drm_intel_bo *bo, int write_enable) &set_domain); if (ret != 0) { DBG("%s:%d: Error setting to CPU domain %d: %s\n", - __FILE__, __LINE__, bo_gem->gem_handle, + __FILE__, __LINE__, bo_gem->bo.handle, strerror(errno)); } @@ -1215,10 +1212,10 @@ map_gtt(drm_intel_bo *bo) struct drm_i915_gem_mmap_gtt mmap_arg; DBG("bo_map_gtt: mmap %d (%s), map_count=%d\n", - bo_gem->gem_handle, bo_gem->name, bo_gem->map_count); + bo_gem->bo.handle, bo_gem->name, bo_gem->map_count); VG_CLEAR(mmap_arg); - mmap_arg.handle = bo_gem->gem_handle; + mmap_arg.handle = bo_gem->bo.handle; /* Get the fake offset back... */ ret = drmIoctl(bufmgr_gem->fd, @@ -1228,7 +1225,7 @@ map_gtt(drm_intel_bo *bo) ret = -errno; DBG("%s:%d: Error preparing buffer map %d (%s): %s .\n", __FILE__, __LINE__, - bo_gem->gem_handle, bo_gem->name, + bo_gem->bo.handle, bo_gem->name, strerror(errno)); if (--bo_gem->map_count == 0) drm_intel_gem_bo_close_vma(bufmgr_gem, bo_gem); @@ -1244,7 +1241,7 @@ map_gtt(drm_intel_bo *bo) ret = -errno; DBG("%s:%d: Error mapping buffer %d (%s): %s .\n", __FILE__, __LINE__, - bo_gem->gem_handle, bo_gem->name, + bo_gem->bo.handle, bo_gem->name, strerror(errno)); if (--bo_gem->map_count == 0) drm_intel_gem_bo_close_vma(bufmgr_gem, bo_gem); @@ -1254,7 +1251,7 @@ map_gtt(drm_intel_bo *bo) bo->virtual = bo_gem->gtt_virtual; - DBG("bo_map_gtt: %d (%s) -> %p\n", bo_gem->gem_handle, bo_gem->name, + DBG("bo_map_gtt: %d (%s) -> %p\n", bo_gem->bo.handle, bo_gem->name, bo_gem->gtt_virtual); return 0; @@ -1285,7 +1282,7 @@ int drm_intel_gem_bo_map_gtt(drm_intel_bo *bo) * rendering and it still happens to be bound to the GTT. */ VG_CLEAR(set_domain); - set_domain.handle = bo_gem->gem_handle; + set_domain.handle = bo_gem->bo.handle; set_domain.read_domains = I915_GEM_DOMAIN_GTT; set_domain.write_domain = I915_GEM_DOMAIN_GTT; ret = drmIoctl(bufmgr_gem->fd, @@ -1293,7 +1290,7 @@ int drm_intel_gem_bo_map_gtt(drm_intel_bo *bo) &set_domain); if (ret != 0) { DBG("%s:%d: Error setting domain %d: %s\n", - __FILE__, __LINE__, bo_gem->gem_handle, + __FILE__, __LINE__, bo_gem->bo.handle, strerror(errno)); } @@ -1369,7 +1366,7 @@ static int drm_intel_gem_bo_unmap(drm_intel_bo *bo) * buffer should be scanout-related. */ VG_CLEAR(sw_finish); - sw_finish.handle = bo_gem->gem_handle; + sw_finish.handle = bo_gem->bo.handle; ret = drmIoctl(bufmgr_gem->fd, DRM_IOCTL_I915_GEM_SW_FINISH, &sw_finish); @@ -1407,7 +1404,7 @@ drm_intel_gem_bo_subdata(drm_intel_bo *bo, unsigned long offset, int ret; VG_CLEAR(pwrite); - pwrite.handle = bo_gem->gem_handle; + pwrite.handle = bo_gem->bo.handle; pwrite.offset = offset; pwrite.size = size; pwrite.data_ptr = (uint64_t) (uintptr_t) data; @@ -1417,7 +1414,7 @@ drm_intel_gem_bo_subdata(drm_intel_bo *bo, unsigned long offset, if (ret != 0) { ret = -errno; DBG("%s:%d: Error writing data to buffer %d: (%d %d) %s .\n", - __FILE__, __LINE__, bo_gem->gem_handle, (int)offset, + __FILE__, __LINE__, bo_gem->bo.handle, (int)offset, (int)size, strerror(errno)); } @@ -1459,7 +1456,7 @@ drm_intel_gem_bo_get_subdata(drm_intel_bo *bo, unsigned long offset, int ret; VG_CLEAR(pread); - pread.handle = bo_gem->gem_handle; + pread.handle = bo_gem->bo.handle; pread.offset = offset; pread.size = size; pread.data_ptr = (uint64_t) (uintptr_t) data; @@ -1469,7 +1466,7 @@ drm_intel_gem_bo_get_subdata(drm_intel_bo *bo, unsigned long offset, if (ret != 0) { ret = -errno; DBG("%s:%d: Error reading data from buffer %d: (%d %d) %s .\n", - __FILE__, __LINE__, bo_gem->gem_handle, (int)offset, + __FILE__, __LINE__, bo_gem->bo.handle, (int)offset, (int)size, strerror(errno)); } @@ -1525,7 +1522,7 @@ int drm_intel_gem_bo_wait(drm_intel_bo *bo, int64_t timeout_ns) } } - wait.bo_handle = bo_gem->gem_handle; + wait.bo_handle = bo_gem->bo.handle; wait.timeout_ns = timeout_ns; wait.flags = 0; ret = drmIoctl(bufmgr_gem->fd, DRM_IOCTL_I915_GEM_WAIT, &wait); @@ -1551,7 +1548,7 @@ drm_intel_gem_bo_start_gtt_access(drm_intel_bo *bo, int write_enable) int ret; VG_CLEAR(set_domain); - set_domain.handle = bo_gem->gem_handle; + set_domain.handle = bo_gem->bo.handle; set_domain.read_domains = I915_GEM_DOMAIN_GTT; set_domain.write_domain = write_enable ? I915_GEM_DOMAIN_GTT : 0; ret = drmIoctl(bufmgr_gem->fd, @@ -1559,7 +1556,7 @@ drm_intel_gem_bo_start_gtt_access(drm_intel_bo *bo, int write_enable) &set_domain); if (ret != 0) { DBG("%s:%d: Error setting memory domains %d (%08x %08x): %s .\n", - __FILE__, __LINE__, bo_gem->gem_handle, + __FILE__, __LINE__, bo_gem->bo.handle, set_domain.read_domains, set_domain.write_domain, strerror(errno)); } @@ -1660,7 +1657,7 @@ do_bo_emit_reloc(drm_intel_bo *bo, uint32_t offset, bo_gem->relocs[bo_gem->reloc_count].offset = offset; bo_gem->relocs[bo_gem->reloc_count].delta = target_offset; bo_gem->relocs[bo_gem->reloc_count].target_handle = - target_bo_gem->gem_handle; + target_bo_gem->bo.handle; bo_gem->relocs[bo_gem->reloc_count].read_domains = read_domains; bo_gem->relocs[bo_gem->reloc_count].write_domain = write_domain; bo_gem->relocs[bo_gem->reloc_count].presumed_offset = target_bo->offset; @@ -1816,7 +1813,7 @@ drm_intel_update_buffer_offsets(drm_intel_bufmgr_gem *bufmgr_gem) /* Update the buffer offset */ if (bufmgr_gem->exec_objects[i].offset != bo->offset) { DBG("BO %d (%s) migrated: 0x%08lx -> 0x%08llx\n", - bo_gem->gem_handle, bo_gem->name, bo->offset, + bo_gem->bo.handle, bo_gem->name, bo->offset, (unsigned long long)bufmgr_gem->exec_objects[i]. offset); bo->offset = bufmgr_gem->exec_objects[i].offset; @@ -1836,7 +1833,7 @@ drm_intel_update_buffer_offsets2 (drm_intel_bufmgr_gem *bufmgr_gem) /* Update the buffer offset */ if (bufmgr_gem->exec2_objects[i].offset != bo->offset) { DBG("BO %d (%s) migrated: 0x%08lx -> 0x%08llx\n", - bo_gem->gem_handle, bo_gem->name, bo->offset, + bo_gem->bo.handle, bo_gem->name, bo->offset, (unsigned long long)bufmgr_gem->exec2_objects[i].offset); bo->offset = bufmgr_gem->exec2_objects[i].offset; } @@ -2322,7 +2319,7 @@ drm_intel_gem_bo_pin(drm_intel_bo *bo, uint32_t alignment) int ret; VG_CLEAR(pin); - pin.handle = bo_gem->gem_handle; + pin.handle = bo_gem->bo.handle; pin.alignment = alignment; ret = drmIoctl(bufmgr_gem->fd, @@ -2344,7 +2341,7 @@ drm_intel_gem_bo_unpin(drm_intel_bo *bo) int ret; VG_CLEAR(unpin); - unpin.handle = bo_gem->gem_handle; + unpin.handle = bo_gem->bo.handle; ret = drmIoctl(bufmgr_gem->fd, DRM_IOCTL_I915_GEM_UNPIN, &unpin); if (ret != 0) @@ -2374,7 +2371,7 @@ drm_intel_gem_bo_set_tiling_internal(drm_intel_bo *bo, * input on the error path, so we have to open code * rmIoctl. */ - set_tiling.handle = bo_gem->gem_handle; + set_tiling.handle = bo_gem->bo.handle; set_tiling.tiling_mode = tiling_mode; set_tiling.stride = stride; @@ -2447,8 +2444,6 @@ drm_intel_bo_gem_create_from_prime(drm_intel_bufmgr *bufmgr, int prime_fd, int s bo_gem->bo.handle = handle; bo_gem->bo.bufmgr = bufmgr; - bo_gem->gem_handle = handle; - atomic_set(&bo_gem->refcount, 1); bo_gem->name = "prime"; @@ -2462,7 +2457,7 @@ drm_intel_bo_gem_create_from_prime(drm_intel_bufmgr *bufmgr, int prime_fd, int s DRMINITLISTHEAD(&bo_gem->vma_list); VG_CLEAR(get_tiling); - get_tiling.handle = bo_gem->gem_handle; + get_tiling.handle = bo_gem->bo.handle; ret = drmIoctl(bufmgr_gem->fd, DRM_IOCTL_I915_GEM_GET_TILING, &get_tiling); @@ -2484,7 +2479,7 @@ drm_intel_bo_gem_export_to_prime(drm_intel_bo *bo, int *prime_fd) drm_intel_bufmgr_gem *bufmgr_gem = (drm_intel_bufmgr_gem *) bo->bufmgr; drm_intel_bo_gem *bo_gem = (drm_intel_bo_gem *) bo; - if (drmPrimeHandleToFD(bufmgr_gem->fd, bo_gem->gem_handle, + if (drmPrimeHandleToFD(bufmgr_gem->fd, bo_gem->bo.handle, DRM_CLOEXEC, prime_fd) != 0) return -errno; @@ -2504,7 +2499,7 @@ drm_intel_gem_bo_flink(drm_intel_bo *bo, uint32_t * name) struct drm_gem_flink flink; VG_CLEAR(flink); - flink.handle = bo_gem->gem_handle; + flink.handle = bo_gem->bo.handle; ret = drmIoctl(bufmgr_gem->fd, DRM_IOCTL_GEM_FLINK, &flink); if (ret != 0)