From patchwork Thu Jun 27 23:30:12 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ben Widawsky X-Patchwork-Id: 2796091 Return-Path: X-Original-To: patchwork-intel-gfx@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 808969F3A0 for ; Thu, 27 Jun 2013 23:34:41 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 654CC201CA for ; Thu, 27 Jun 2013 23:34:40 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by mail.kernel.org (Postfix) with ESMTP id 5C865201C8 for ; Thu, 27 Jun 2013 23:34:39 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 2C51AE62A5 for ; Thu, 27 Jun 2013 16:34:39 -0700 (PDT) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from shiva.localdomain (unknown [209.20.75.48]) by gabe.freedesktop.org (Postfix) with ESMTP id 90E6DE5D11 for ; Thu, 27 Jun 2013 16:28:18 -0700 (PDT) Received: by shiva.localdomain (Postfix, from userid 99) id 67640886AE; Thu, 27 Jun 2013 23:28:18 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Spam-Level: X-Spam-Status: No, score=-5.5 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, RP_MATCHES_RCVD,UNPARSEABLE_RELAY autolearn=ham version=3.3.1 Received: from lundgren.jf.intel.com (jfdmzpr02-ext.jf.intel.com [134.134.137.71]) by shiva.localdomain (Postfix) with ESMTPSA id 461D6886A6; Thu, 27 Jun 2013 23:28:17 +0000 (UTC) From: Ben Widawsky To: Intel GFX Date: Thu, 27 Jun 2013 16:30:12 -0700 Message-Id: <1372375867-1003-12-git-send-email-ben@bwidawsk.net> X-Mailer: git-send-email 1.8.3.1 In-Reply-To: <1372375867-1003-1-git-send-email-ben@bwidawsk.net> References: <1372375867-1003-1-git-send-email-ben@bwidawsk.net> Cc: Ben Widawsky Subject: [Intel-gfx] [PATCH 11/66] drm/i915: destroy i915_gem_init_global_gtt X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.13 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: intel-gfx-bounces+patchwork-intel-gfx=patchwork.kernel.org@lists.freedesktop.org Errors-To: intel-gfx-bounces+patchwork-intel-gfx=patchwork.kernel.org@lists.freedesktop.org X-Virus-Scanned: ClamAV using ClamSMTP In continuing to make default context/aliasing PPGTT behave like any other context/PPGTT pair this patch sets us up by moving the context/PPGTT init to a common location. The resulting code isn't a huge improvement, but that will change in the next patch (at least a bit). In the process of doing this, make the ppgtt init function a bit more generic Signed-off-by: Ben Widawsky --- drivers/gpu/drm/i915/i915_drv.h | 4 +-- drivers/gpu/drm/i915/i915_gem.c | 36 ++++++++++++++++++--- drivers/gpu/drm/i915/i915_gem_gtt.c | 63 +++++++++---------------------------- 3 files changed, 48 insertions(+), 55 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h index 7c3ba90..1500fe4 100644 --- a/drivers/gpu/drm/i915/i915_drv.h +++ b/drivers/gpu/drm/i915/i915_drv.h @@ -1839,20 +1839,20 @@ int i915_gem_context_destroy_ioctl(struct drm_device *dev, void *data, struct drm_file *file); /* i915_gem_gtt.c */ +bool intel_enable_ppgtt(struct drm_device *dev); +int i915_gem_ppgtt_init(struct drm_device *dev, struct i915_hw_ppgtt *ppgtt); void i915_gem_cleanup_aliasing_ppgtt(struct drm_device *dev); void i915_ppgtt_bind_object(struct i915_hw_ppgtt *ppgtt, struct drm_i915_gem_object *obj, enum i915_cache_level cache_level); void i915_ppgtt_unbind_object(struct i915_hw_ppgtt *ppgtt, struct drm_i915_gem_object *obj); - void i915_gem_restore_gtt_mappings(struct drm_device *dev); int __must_check i915_gem_gtt_prepare_object(struct drm_i915_gem_object *obj); void i915_gem_gtt_bind_object(struct drm_i915_gem_object *obj, enum i915_cache_level cache_level); void i915_gem_gtt_unbind_object(struct drm_i915_gem_object *obj); void i915_gem_gtt_finish_object(struct drm_i915_gem_object *obj); -void i915_gem_init_global_gtt(struct drm_device *dev); void i915_gem_setup_global_gtt(struct drm_device *dev, unsigned long start, unsigned long mappable_end, unsigned long end, unsigned long guard_size); diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c index 64f8087..4f46cf8 100644 --- a/drivers/gpu/drm/i915/i915_gem.c +++ b/drivers/gpu/drm/i915/i915_gem.c @@ -4209,7 +4209,7 @@ i915_gem_init_hw(struct drm_device *dev) int i915_gem_init(struct drm_device *dev) { struct drm_i915_private *dev_priv = dev->dev_private; - int ret; + int ret = -ENODEV; mutex_lock(&dev->struct_mutex); @@ -4220,16 +4220,42 @@ int i915_gem_init(struct drm_device *dev) DRM_DEBUG_DRIVER("allow wake ack timed out\n"); } - i915_gem_init_global_gtt(dev); + if (intel_enable_ppgtt(dev) && HAS_ALIASING_PPGTT(dev)) { + struct i915_hw_ppgtt *ppgtt; + ppgtt = kzalloc(sizeof(*ppgtt), GFP_KERNEL); + if (!ppgtt) + goto ggtt_only; + + + i915_gem_setup_global_gtt(dev, 0, dev_priv->gtt.mappable_end, + dev_priv->gtt.total, 0); + i915_gem_context_init(dev); + ret = i915_gem_ppgtt_init(dev, ppgtt); + if (ret) { + kfree(ppgtt); + drm_mm_takedown(&dev_priv->mm.gtt_space); + goto ggtt_only; + } - i915_gem_context_init(dev); + dev_priv->mm.aliasing_ppgtt = ppgtt; + } + +ggtt_only: + if (ret) { + if (intel_enable_ppgtt(dev) && HAS_ALIASING_PPGTT(dev)) + DRM_DEBUG_DRIVER("Aliased PPGTT setup fail %d\n", ret); + i915_gem_setup_global_gtt(dev, 0, dev_priv->gtt.mappable_end, + dev_priv->gtt.total, PAGE_SIZE); + } ret = i915_gem_init_hw(dev); - mutex_unlock(&dev->struct_mutex); if (ret) { i915_gem_cleanup_aliasing_ppgtt(dev); - return ret; + i915_gem_context_fini(dev); } + mutex_unlock(&dev->struct_mutex); + if (ret) + return ret; /* Allow hardware batchbuffers unless told otherwise, but not for KMS. */ if (!drm_core_check_feature(dev, DRIVER_MODESET)) diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c b/drivers/gpu/drm/i915/i915_gem_gtt.c index 5284dc5..6266b1a 100644 --- a/drivers/gpu/drm/i915/i915_gem_gtt.c +++ b/drivers/gpu/drm/i915/i915_gem_gtt.c @@ -360,16 +360,11 @@ err_pt_alloc: return ret; } -static int i915_gem_init_aliasing_ppgtt(struct drm_device *dev) +int i915_gem_ppgtt_init(struct drm_device *dev, struct i915_hw_ppgtt *ppgtt) { struct drm_i915_private *dev_priv = dev->dev_private; - struct i915_hw_ppgtt *ppgtt; int ret; - ppgtt = kzalloc(sizeof(*ppgtt), GFP_KERNEL); - if (!ppgtt) - return -ENOMEM; - ppgtt->dev = dev; ppgtt->scratch_page_dma_addr = dev_priv->gtt.scratch_page_dma; @@ -378,11 +373,6 @@ static int i915_gem_init_aliasing_ppgtt(struct drm_device *dev) else BUG(); - if (ret) - kfree(ppgtt); - else - dev_priv->mm.aliasing_ppgtt = ppgtt; - return ret; } @@ -637,6 +627,20 @@ static void i915_gtt_color_adjust(struct drm_mm_node *node, } } +bool intel_enable_ppgtt(struct drm_device *dev) +{ + if (i915_enable_ppgtt >= 0) + return i915_enable_ppgtt; + +#ifdef CONFIG_INTEL_IOMMU + /* Disable ppgtt on SNB if VT-d is on. */ + if (INTEL_INFO(dev)->gen == 6 && intel_iommu_gfx_mapped) + return false; +#endif + + return true; +} + /** * i915_gem_setup_global_gtt() setup an allocator for the global GTT with the * given parameters and initialize all PTEs to point to the scratch page. @@ -708,43 +712,6 @@ void i915_gem_setup_global_gtt(struct drm_device *dev, guard_size / PAGE_SIZE); } -static bool -intel_enable_ppgtt(struct drm_device *dev) -{ - if (i915_enable_ppgtt >= 0) - return i915_enable_ppgtt; - -#ifdef CONFIG_INTEL_IOMMU - /* Disable ppgtt on SNB if VT-d is on. */ - if (INTEL_INFO(dev)->gen == 6 && intel_iommu_gfx_mapped) - return false; -#endif - - return true; -} - -void i915_gem_init_global_gtt(struct drm_device *dev) -{ - struct drm_i915_private *dev_priv = dev->dev_private; - unsigned long gtt_size, mappable_size; - - gtt_size = dev_priv->gtt.total; - mappable_size = dev_priv->gtt.mappable_end; - - if (intel_enable_ppgtt(dev) && HAS_ALIASING_PPGTT(dev)) { - int ret; - - i915_gem_setup_global_gtt(dev, 0, mappable_size, gtt_size, 0); - ret = i915_gem_init_aliasing_ppgtt(dev); - if (!ret) - return; - - DRM_ERROR("Aliased PPGTT setup failed %d\n", ret); - drm_mm_takedown(&dev_priv->mm.gtt_space); - } - i915_gem_setup_global_gtt(dev, 0, mappable_size, gtt_size, PAGE_SIZE); -} - static int setup_scratch_page(struct drm_device *dev) { struct drm_i915_private *dev_priv = dev->dev_private;