From patchwork Fri Jun 28 17:52:10 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Rodrigo Vivi X-Patchwork-Id: 2800381 Return-Path: X-Original-To: patchwork-intel-gfx@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 498939F3A0 for ; Fri, 28 Jun 2013 17:52:28 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 2752620200 for ; Fri, 28 Jun 2013 17:52:27 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by mail.kernel.org (Postfix) with ESMTP id B4692201FC for ; Fri, 28 Jun 2013 17:52:25 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id BD2BBE66EF for ; Fri, 28 Jun 2013 10:52:25 -0700 (PDT) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mail-pa0-f47.google.com (mail-pa0-f47.google.com [209.85.220.47]) by gabe.freedesktop.org (Postfix) with ESMTP id BF4C6E5C5F for ; Fri, 28 Jun 2013 10:52:16 -0700 (PDT) Received: by mail-pa0-f47.google.com with SMTP id kl14so2707950pab.6 for ; Fri, 28 Jun 2013 10:52:16 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=from:to:cc:subject:date:message-id:x-mailer:in-reply-to:references; bh=i/7vdbjgQ2pf4rac77wStGFB8LmjZKcXXcsemDEdAbw=; b=sHRAEx6YQpskIkQY7LdKaM9KZE2I4d3dsdlFzkfbcWRLmQ/ee3U7nalX4aMV3SgM9X SSWsWaJ3QavZixAC5lyFeWxiMAsJgTkaiMryRkZJz/nWBxR44q5GsQJesPk4/e2WOmdZ KBwfGGC8hM1I4rfXLywDiU8wwKOlJf2+0phTuFm5yCFKZ1cNGR4ctGZgA4ZS5eaJln1k xT3RV5y+jx4rR8D4QrmroSowsyPQmDzmDv0PB2aLDDIvrWiB4bUG3D/Vat+nCOASA+rN 8vCkjX5QagcP2OGRInLoZ/qCtHl8ouLI/EoQMmbD42HP0k+rpDK1Es0dz4AYTOqrfkSG IA0Q== X-Received: by 10.68.111.228 with SMTP id il4mr12433933pbb.134.1372441936508; Fri, 28 Jun 2013 10:52:16 -0700 (PDT) Received: from localhost (jfdmzpr02-ext.jf.intel.com. [134.134.137.71]) by mx.google.com with ESMTPSA id ve3sm9138562pbc.14.2013.06.28.10.52.14 for (version=TLSv1.2 cipher=RC4-SHA bits=128/128); Fri, 28 Jun 2013 10:52:15 -0700 (PDT) From: Rodrigo Vivi To: intel-gfx@lists.freedesktop.org Date: Fri, 28 Jun 2013 14:52:10 -0300 Message-Id: <1372441930-18280-1-git-send-email-rodrigo.vivi@gmail.com> X-Mailer: git-send-email 1.8.1.4 In-Reply-To: <1372338222-30460-1-git-send-email-rodrigo.vivi@gmail.com> References: <1372338222-30460-1-git-send-email-rodrigo.vivi@gmail.com> Subject: [Intel-gfx] [PATCH] drm/i915: Add functions to force psr exit X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.13 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: intel-gfx-bounces+patchwork-intel-gfx=patchwork.kernel.org@lists.freedesktop.org Errors-To: intel-gfx-bounces+patchwork-intel-gfx=patchwork.kernel.org@lists.freedesktop.org X-Spam-Status: No, score=-5.4 required=5.0 tests=BAYES_00, DKIM_ADSP_CUSTOM_MED, DKIM_SIGNED, FREEMAIL_FROM, RCVD_IN_DNSWL_MED, RP_MATCHES_RCVD, T_DKIM_INVALID, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP PSR tracking engine in HSW doesn't detect automagically some directly copy area operations through scanout so we will have to kick it manually and reschedule it to come back to normal operation as soon as possible. v2: Before PSR Hook. Don't force it when busy yet. v3/v4: Solved small conflict. Signed-off-by: Rodrigo Vivi --- drivers/gpu/drm/i915/i915_reg.h | 1 + drivers/gpu/drm/i915/intel_dp.c | 59 ++++++++++++++++++++++++++++++++++++++++ drivers/gpu/drm/i915/intel_drv.h | 4 +++ 3 files changed, 64 insertions(+) diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h index 833cc97..a19245b 100644 --- a/drivers/gpu/drm/i915/i915_reg.h +++ b/drivers/gpu/drm/i915/i915_reg.h @@ -1838,6 +1838,7 @@ #define EDP_PSR_PERF_CNT_MASK 0xffffff #define EDP_PSR_DEBUG_CTL 0x64860 +#define EDP_PSR_DEBUG_FORCE_EXIT (3<<30) #define EDP_PSR_DEBUG_MASK_LPSP (1<<27) #define EDP_PSR_DEBUG_MASK_MEMUP (1<<26) #define EDP_PSR_DEBUG_MASK_HPD (1<<25) diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c index 68c81ab..5001fd9 100644 --- a/drivers/gpu/drm/i915/intel_dp.c +++ b/drivers/gpu/drm/i915/intel_dp.c @@ -1366,6 +1366,48 @@ bool intel_edp_is_psr_enabled(struct drm_device *dev) return I915_READ(EDP_PSR_CTL) & EDP_PSR_ENABLE; } +static void intel_edp_psr_delayed_normal_work(struct work_struct *__work) +{ + struct intel_dp *intel_dp = container_of(to_delayed_work(__work), + struct intel_dp, + edp_psr_delayed_normal_work); + struct drm_device *dev = intel_dp_to_dev(intel_dp); + struct drm_i915_private *dev_priv = dev->dev_private; + + mutex_lock(&intel_dp->psr_exit_mutex); + I915_WRITE(EDP_PSR_DEBUG_CTL, I915_READ(EDP_PSR_DEBUG_CTL) & + ~EDP_PSR_DEBUG_FORCE_EXIT); + mutex_unlock(&intel_dp->psr_exit_mutex); +} + +void intel_edp_psr_force_exit(struct drm_device *dev) +{ + struct drm_i915_private *dev_priv = dev->dev_private; + struct intel_encoder *encoder; + struct intel_dp *intel_dp = NULL; + + if (!intel_edp_is_psr_enabled(dev)) + return; + + list_for_each_entry(encoder, &dev->mode_config.encoder_list, base.head) + if (encoder->type == INTEL_OUTPUT_EDP) + intel_dp = enc_to_intel_dp(&encoder->base); + + if (!intel_dp) + return; + + if (WARN_ON(!intel_dp->psr_setup_done)) + return; + + mutex_lock(&intel_dp->psr_exit_mutex); + I915_WRITE(EDP_PSR_DEBUG_CTL, I915_READ(EDP_PSR_DEBUG_CTL) | + EDP_PSR_DEBUG_FORCE_EXIT); + mutex_unlock(&intel_dp->psr_exit_mutex); + + schedule_delayed_work(&intel_dp->edp_psr_delayed_normal_work, + msecs_to_jiffies(100)); +} + void intel_edp_psr_write_vsc(struct intel_dp *intel_dp, struct edp_vsc_psr *vsc_psr) { @@ -1400,6 +1442,18 @@ void intel_edp_psr_write_vsc(struct intel_dp *intel_dp, POSTING_READ(ctl_reg); } +static void intel_edp_psr_setup(struct intel_dp *intel_dp) +{ + if (intel_dp->psr_setup_done) + return; + + INIT_DELAYED_WORK(&intel_dp->edp_psr_delayed_normal_work, + intel_edp_psr_delayed_normal_work); + mutex_init(&intel_dp->psr_exit_mutex); + + intel_dp->psr_setup_done = true; +} + static void intel_edp_psr_enable_sink(struct intel_dp *intel_dp) { struct drm_device *dev = intel_dp_to_dev(intel_dp); @@ -1544,6 +1598,9 @@ static bool intel_edp_psr_match_conditions(struct intel_dp *intel_dp) void intel_edp_psr_do_enable(struct intel_dp *intel_dp) { + /* Setup PSR once */ + intel_edp_psr_setup(intel_dp); + /* Enable PSR on the panel */ intel_edp_psr_enable_sink(intel_dp); @@ -3413,6 +3470,8 @@ intel_dp_init_connector(struct intel_digital_port *intel_dig_port, WARN(error, "intel_dp_i2c_init failed with error %d for port %c\n", error, port_name(port)); + intel_dp->psr_setup_done = false; + if (!intel_edp_init_connector(intel_dp, intel_connector)) { i2c_del_adapter(&intel_dp->adapter); if (is_edp(intel_dp)) { diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h index 65f5001..3b2ccaa 100644 --- a/drivers/gpu/drm/i915/intel_drv.h +++ b/drivers/gpu/drm/i915/intel_drv.h @@ -497,6 +497,9 @@ struct intel_dp { int backlight_on_delay; int backlight_off_delay; struct delayed_work panel_vdd_work; + struct delayed_work edp_psr_delayed_normal_work; + struct mutex psr_exit_mutex; + bool psr_setup_done; bool want_panel_vdd; struct intel_connector *attached_connector; }; @@ -844,5 +847,6 @@ extern void intel_edp_psr_enable(struct intel_dp *intel_dp); extern void intel_edp_psr_disable(struct intel_dp *intel_dp); extern void intel_edp_psr_update(struct drm_device *dev); extern bool intel_edp_is_psr_enabled(struct drm_device *dev); +extern void intel_edp_psr_force_exit(struct drm_device *dev); #endif /* __INTEL_DRV_H__ */