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CHROMIUM: drm/i915: Tune the rc6 value again

Message ID 1376613069-15790-39-git-send-email-james.ausmus@intel.com (mailing list archive)
State New, archived
Headers show

Commit Message

James Ausmus Aug. 16, 2013, 12:31 a.m. UTC 
From: Stéphane Marchesin <marcheu@chromium.org>

Apparently 150k doesn't work on snb. After probing the snb I have
here, 125k is the max that the hardware seems to work with, and
luckily it seems stable after 50 power_Resume runs. So let's use
that.

BUG=chromium:251989
TEST=see rc6 residency go up in /sys/kernel/debug/dri/0/i915_drpc_info

Change-Id: Id78546f939c3d321760e2c32a894cb5ef4118998
Reviewed-on: https://gerrit.chromium.org/gerrit/59359
Tested-by: Stéphane Marchesin <marcheu@chromium.org>
Reviewed-by: Sonny Rao <sonnyrao@chromium.org>
Commit-Queue: Stéphane Marchesin <marcheu@chromium.org>
---
 drivers/gpu/drm/i915/intel_pm.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)
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Patch

diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index 8105d10..a735190 100644
--- a/drivers/gpu/drm/i915/intel_pm.c
+++ b/drivers/gpu/drm/i915/intel_pm.c
@@ -2572,7 +2572,7 @@  static void gen6_enable_rps(struct drm_device *dev)
 
 	I915_WRITE(GEN6_RC_SLEEP, 0);
 	I915_WRITE(GEN6_RC1e_THRESHOLD, 1000);
-	I915_WRITE(GEN6_RC6_THRESHOLD, 150000);
+	I915_WRITE(GEN6_RC6_THRESHOLD, 125000);
 	I915_WRITE(GEN6_RC6p_THRESHOLD, 150000);
 	I915_WRITE(GEN6_RC6pp_THRESHOLD, 64000); /* unused */