From patchwork Fri Aug 16 00:31:05 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: James Ausmus X-Patchwork-Id: 2845322 Return-Path: X-Original-To: patchwork-intel-gfx@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 6455A9F2F5 for ; Fri, 16 Aug 2013 00:42:11 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 83E95202B1 for ; Fri, 16 Aug 2013 00:42:10 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by mail.kernel.org (Postfix) with ESMTP id 81D712021E for ; Fri, 16 Aug 2013 00:42:09 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 8A02343A3F for ; Thu, 15 Aug 2013 17:42:09 -0700 (PDT) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mga02.intel.com (mga02.intel.com [134.134.136.20]) by gabe.freedesktop.org (Postfix) with ESMTP id C4BAFE66C0 for ; Thu, 15 Aug 2013 17:31:59 -0700 (PDT) Received: from orsmga002.jf.intel.com ([10.7.209.21]) by orsmga101.jf.intel.com with ESMTP; 15 Aug 2013 17:31:57 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="4.89,889,1367996400"; d="scan'208";a="387901472" Received: from jausmus-gentoo-dev5.jf.intel.com ([10.7.198.60]) by orsmga002.jf.intel.com with ESMTP; 15 Aug 2013 17:31:57 -0700 From: james.ausmus@intel.com To: intel-gfx@lists.freedesktop.org Date: Thu, 15 Aug 2013 17:31:05 -0700 Message-Id: <1376613069-15790-41-git-send-email-james.ausmus@intel.com> X-Mailer: git-send-email 1.8.3.2 In-Reply-To: <1376613069-15790-1-git-send-email-james.ausmus@intel.com> References: <1376613069-15790-1-git-send-email-james.ausmus@intel.com> MIME-Version: 1.0 Subject: [Intel-gfx] [PATCH] CHROMIUM: drm/i915: set lower RC6_THRESHOLD for HSW X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.13 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: intel-gfx-bounces+patchwork-intel-gfx=patchwork.kernel.org@lists.freedesktop.org Errors-To: intel-gfx-bounces+patchwork-intel-gfx=patchwork.kernel.org@lists.freedesktop.org X-Spam-Status: No, score=-7.0 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Sameer Nanda On Sandybridge/Ivybridge platforms, a higher RC6_THRESHOLD is required for stability reasons. On Haswell, however, this higher setting is resulting in an additional ~800mW of power consumption in light GPU usage scenarios such as blinking cursor. Lowering RC6_THRESHOLD to 50000 on Haswell does not seem to cause stability issues. Therefore, on SNB/IVB keep the higher threshold for stability reasons, but on HSW use the default 50000 threshold for power saving reasons. BUG=chrome-os-partner:20744 TEST=1. On SNB (lumpy) and IVB (link) systems, "intel_reg_read 0xa0b8" command should return 0x1E848. 2. On Haswell systems, "intel_reg_read 0xa0b8" command should return 0xC350. Change-Id: I2f7d5895b925dcf3ff96a2756e699797bda4104d Signed-off-by: Sameer Nanda Reviewed-on: https://gerrit.chromium.org/gerrit/61302 Reviewed-by: Stéphane Marchesin --- drivers/gpu/drm/i915/intel_pm.c | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c index a701495..56e65f9 100644 --- a/drivers/gpu/drm/i915/intel_pm.c +++ b/drivers/gpu/drm/i915/intel_pm.c @@ -3166,7 +3166,10 @@ static void gen6_enable_rps(struct drm_device *dev) I915_WRITE(GEN6_RC_SLEEP, 0); I915_WRITE(GEN6_RC1e_THRESHOLD, 1000); - I915_WRITE(GEN6_RC6_THRESHOLD, 125000); + if (INTEL_INFO(dev)->gen <= 6 || IS_IVYBRIDGE(dev)) + I915_WRITE(GEN6_RC6_THRESHOLD, 125000); + else + I915_WRITE(GEN6_RC6_THRESHOLD, 50000); I915_WRITE(GEN6_RC6p_THRESHOLD, 150000); I915_WRITE(GEN6_RC6pp_THRESHOLD, 64000); /* unused */