Message ID | 1377557469-4078-15-git-send-email-rodrigo.vivi@gmail.com (mailing list archive) |
---|---|
State | New, archived |
Headers | show |
On Mon, Aug 26, 2013 at 07:51:06PM -0300, Rodrigo Vivi wrote: > From: Chris Wilson <chris@chris-wilson.co.uk> > > It appears that Valleyview shares its VGA encoder with more recent > siblings and requires the same forced detection cycle after a hardware > reset before we can rely on hotplugging. > > Reported-and-tested-by: kobeqin <kobe.qin@intel.com> > Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=67733 > Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Queued for -next with the bikeshed applied as discussed, thanks for the patch. -Daniel
diff --git a/drivers/gpu/drm/i915/intel_crt.c b/drivers/gpu/drm/i915/intel_crt.c index b5a3875..7475200 100644 --- a/drivers/gpu/drm/i915/intel_crt.c +++ b/drivers/gpu/drm/i915/intel_crt.c @@ -688,7 +688,7 @@ static void intel_crt_reset(struct drm_connector *connector) struct drm_i915_private *dev_priv = dev->dev_private; struct intel_crt *crt = intel_attached_crt(connector); - if (HAS_PCH_SPLIT(dev)) { + if (HAS_PCH_SPLIT(dev) || IS_VALLEYVIEW(dev)) { u32 adpa; adpa = I915_READ(crt->adpa_reg);