| Message ID | 1380142262-2141-1-git-send-email-rodrigo.vivi@gmail.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
Hi Daniel, Please consider to accept this for -fixes, otherwise PSR will never work on Haswell on 3.12. Thanks, Rodrigo. On Wed, Sep 25, 2013 at 5:51 PM, Rodrigo Vivi <rodrigo.vivi@gmail.com> wrote: > Power Well in use forces constantly PSR to exit. > On recent Kernel I noticed that PSR Performance Counter was always 0 > indicating that PSR was never really achieved. > By masking LPSP, PSR can work normally and save power on Haswell. > > Signed-off-by: Rodrigo Vivi <rodrigo.vivi@gmail.com> > --- > drivers/gpu/drm/i915/intel_dp.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c > index 79c14e2..2c555f9 100644 > --- a/drivers/gpu/drm/i915/intel_dp.c > +++ b/drivers/gpu/drm/i915/intel_dp.c > @@ -1467,7 +1467,7 @@ static void intel_edp_psr_setup(struct intel_dp *intel_dp) > > /* Avoid continuous PSR exit by masking memup and hpd */ > I915_WRITE(EDP_PSR_DEBUG_CTL, EDP_PSR_DEBUG_MASK_MEMUP | > - EDP_PSR_DEBUG_MASK_HPD); > + EDP_PSR_DEBUG_MASK_HPD | EDP_PSR_DEBUG_MASK_LPSP); > > intel_dp->psr_setup_done = true; > } > -- > 1.7.11.7 >
On Wed, Sep 25, 2013 at 10:59 PM, Rodrigo Vivi <rodrigo.vivi@gmail.com> wrote: > Please consider to accept this for -fixes, otherwise PSR will never > work on Haswell on 3.12. You know the drill: A feature regressed and no one noticed, which means we are lacking a fully automated testcase. I guess we need to expose in debugfs somewhere if the edp panel can do psr (if we don't do that already) to be able to skip the test correctly and then check with a little igt testcase that we actually achieve psr residency. Also please poke QA to make sure they actually have a hsw platform with psr panel. -Daniel
Reporter of that Jira bugs confirmed this patch fixes the issue. debufs simplification and igt test case submited. Thanks On Wed, Sep 25, 2013 at 6:25 PM, Daniel Vetter <daniel@ffwll.ch> wrote: > On Wed, Sep 25, 2013 at 10:59 PM, Rodrigo Vivi <rodrigo.vivi@gmail.com> wrote: >> Please consider to accept this for -fixes, otherwise PSR will never >> work on Haswell on 3.12. > > You know the drill: A feature regressed and no one noticed, which > means we are lacking a fully automated testcase. I guess we need to > expose in debugfs somewhere if the edp panel can do psr (if we don't > do that already) to be able to skip the test correctly and then check > with a little igt testcase that we actually achieve psr residency. > Also please poke QA to make sure they actually have a hsw platform > with psr panel. > -Daniel > -- > Daniel Vetter > Software Engineer, Intel Corporation > +41 (0) 79 365 57 48 - http://blog.ffwll.ch
diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c index 79c14e2..2c555f9 100644 --- a/drivers/gpu/drm/i915/intel_dp.c +++ b/drivers/gpu/drm/i915/intel_dp.c @@ -1467,7 +1467,7 @@ static void intel_edp_psr_setup(struct intel_dp *intel_dp) /* Avoid continuous PSR exit by masking memup and hpd */ I915_WRITE(EDP_PSR_DEBUG_CTL, EDP_PSR_DEBUG_MASK_MEMUP | - EDP_PSR_DEBUG_MASK_HPD); + EDP_PSR_DEBUG_MASK_HPD | EDP_PSR_DEBUG_MASK_LPSP); intel_dp->psr_setup_done = true; }
Power Well in use forces constantly PSR to exit. On recent Kernel I noticed that PSR Performance Counter was always 0 indicating that PSR was never really achieved. By masking LPSP, PSR can work normally and save power on Haswell. Signed-off-by: Rodrigo Vivi <rodrigo.vivi@gmail.com> --- drivers/gpu/drm/i915/intel_dp.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)