Message ID | 1380817886-5924-1-git-send-email-rodrigo.vivi@gmail.com (mailing list archive) |
---|---|
State | New, archived |
Headers | show |
On Thu, Oct 03, 2013 at 01:31:26PM -0300, Rodrigo Vivi wrote: > Power Well in use forces constantly PSR to exit. > On recent Kernel I noticed that PSR Performance Counter was always 0 > indicating that PSR was never really achieved. > By masking LPSP, PSR can work normally and save power on Haswell. > > Two bugs had been raised with PSR flag enabled: > - "Screen flickers when booted by enabling PSR in the kernel (i915.enable_psr=1) , the system is booting to a gray screen." > - "When booting the DUT with PSR feature enabled in the kernel (i915.enable_psr=1) , the system is booting to a gray screen." > > Both bugs has been fixed by this patch. > > v2: proper comment for -fixes > > Tested-by: Selvaraj, Elavarasan <elavarasanx.selvaraj@intel.com> > Signed-off-by: Rodrigo Vivi <rodrigo.vivi@gmail.com> Picked up for -fixes, thanks for the patch. -Daniel
diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c index 79c14e2..2c555f9 100644 --- a/drivers/gpu/drm/i915/intel_dp.c +++ b/drivers/gpu/drm/i915/intel_dp.c @@ -1467,7 +1467,7 @@ static void intel_edp_psr_setup(struct intel_dp *intel_dp) /* Avoid continuous PSR exit by masking memup and hpd */ I915_WRITE(EDP_PSR_DEBUG_CTL, EDP_PSR_DEBUG_MASK_MEMUP | - EDP_PSR_DEBUG_MASK_HPD); + EDP_PSR_DEBUG_MASK_HPD | EDP_PSR_DEBUG_MASK_LPSP); intel_dp->psr_setup_done = true; }