From patchwork Sat Nov 2 00:04:21 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Ben Widawsky X-Patchwork-Id: 3129901 Return-Path: X-Original-To: patchwork-intel-gfx@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 73EB29F474 for ; Sat, 2 Nov 2013 00:04:28 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id A6978204A2 for ; Sat, 2 Nov 2013 00:04:27 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by mail.kernel.org (Postfix) with ESMTP id CE7BA2049D for ; Sat, 2 Nov 2013 00:04:26 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id CDD7EF0258; Fri, 1 Nov 2013 17:04:25 -0700 (PDT) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mga01.intel.com (mga01.intel.com [192.55.52.88]) by gabe.freedesktop.org (Postfix) with ESMTP id 93D23F0258 for ; Fri, 1 Nov 2013 17:04:23 -0700 (PDT) Received: from fmsmga002.fm.intel.com ([10.253.24.26]) by fmsmga101.fm.intel.com with ESMTP; 01 Nov 2013 17:04:22 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="4.93,620,1378882800"; d="scan'208";a="426715601" Received: from jbrandeb-mobl.amr.corp.intel.com (HELO lundgren.intel.com) ([10.255.14.249]) by fmsmga002.fm.intel.com with ESMTP; 01 Nov 2013 17:04:22 -0700 From: Ben Widawsky To: Intel GFX Date: Fri, 1 Nov 2013 17:04:21 -0700 Message-Id: <1383350661-7570-1-git-send-email-benjamin.widawsky@intel.com> X-Mailer: git-send-email 1.8.4.2 In-Reply-To: <1383350573-7427-2-git-send-email-benjamin.widawsky@intel.com> References: <1383350573-7427-2-git-send-email-benjamin.widawsky@intel.com> MIME-Version: 1.0 Cc: Ben Widawsky , Ben Widawsky Subject: [Intel-gfx] [PATCH 2/2] [v2] drm/i915: Disable blt tracking of fbc when not used X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.13 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: intel-gfx-bounces@lists.freedesktop.org Errors-To: intel-gfx-bounces@lists.freedesktop.org X-Spam-Status: No, score=-4.7 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP When not blitting to scanout, we can save some power by not tracking blits, and more importantly, unnecessarily invalidating lines which we don't care a bout. These instructions are explicitly spelled out in the spec, but it is how I expect it to work. Unfortunately, I do not have power data for this. v2: Don't advance the ring twice (Stéphane) Rename extra_dwords to dwrods (Stéphane) Cc: Stéphane Marchesin Signed-off-by: Ben Widawsky Tested-by: Stéphane Marchesin Reviewed-by: Stéphane Marchesin --- drivers/gpu/drm/i915/intel_ringbuffer.c | 20 +++++++++++++++++--- 1 file changed, 17 insertions(+), 3 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915/intel_ringbuffer.c index ddd7681..8c6e9b2 100644 --- a/drivers/gpu/drm/i915/intel_ringbuffer.c +++ b/drivers/gpu/drm/i915/intel_ringbuffer.c @@ -296,7 +296,8 @@ static int gen6_ring_fbc_flush(struct intel_ring_buffer *ring) _MASKED_BIT_ENABLE(GEN6_BLITTER_FBC_NOTIFY)); intel_ring_advance(ring); - ring->fbc_dirty = false; + /* We'll mark the fbc clean only after the operation has completed so we + * can track when to disable the bit above */ return 0; } @@ -642,11 +643,13 @@ gen6_add_request(struct intel_ring_buffer *ring) struct drm_device *dev = ring->dev; struct drm_i915_private *dev_priv = dev->dev_private; struct intel_ring_buffer *useless; - int i, ret; + int i, ret, dwords = 4; + if (ring->fbc_dirty && ring->id == BCS) + dwords += 4; ret = intel_ring_begin(ring, ((I915_NUM_RINGS-1) * MBOX_UPDATE_DWORDS) + - 4); + dwords); if (ret) return ret; #undef MBOX_UPDATE_DWORDS @@ -661,6 +664,17 @@ gen6_add_request(struct intel_ring_buffer *ring) intel_ring_emit(ring, I915_GEM_HWS_INDEX << MI_STORE_DWORD_INDEX_SHIFT); intel_ring_emit(ring, ring->outstanding_lazy_seqno); intel_ring_emit(ring, MI_USER_INTERRUPT); + + if (ring->fbc_dirty && ring->id == BCS) { + intel_ring_emit(ring, MI_NOOP); + intel_ring_emit(ring, MI_LOAD_REGISTER_IMM(1)); + intel_ring_emit(ring, GEN6_BLITTER_ECOSKPD); + intel_ring_emit(ring, + _MASKED_BIT_DISABLE(GEN6_BLITTER_FBC_NOTIFY)); + + ring->fbc_dirty = false; + } + __intel_ring_advance(ring); return 0;