| Message ID | 1383990548-30737-2-git-send-email-shobhit.kumar@intel.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
On Sat, 09 Nov 2013, Shobhit Kumar <shobhit.kumar@intel.com> wrote: > Some panels require one time programming if they do not contain their > own eeprom for basic register initialization. The sequence is > > Panel Reset --> Send OTP --> Enable Pixel Stream --> Enable the panel > > v2: Based on review comments from Jani and Ville > - Updated the commit message with more details > - Move the new parameters out of this patch > > Signed-off-by: Yogesh Mohan Marimuthu <yogesh.mohan.marimuthu@intel.com> > Signed-off-by: Shobhit Kumar <shobhit.kumar@intel.com> > --- > drivers/gpu/drm/i915/intel_dsi.c | 9 ++++++++- > drivers/gpu/drm/i915/intel_dsi.h | 5 +++++ > 2 files changed, 13 insertions(+), 1 deletion(-) > > diff --git a/drivers/gpu/drm/i915/intel_dsi.c b/drivers/gpu/drm/i915/intel_dsi.c > index d257b09..61267e2 100644 > --- a/drivers/gpu/drm/i915/intel_dsi.c > +++ b/drivers/gpu/drm/i915/intel_dsi.c > @@ -147,6 +147,9 @@ static void intel_dsi_enable(struct intel_encoder *encoder) > > DRM_DEBUG_KMS("\n"); > > + if (intel_dsi->dev.dev_ops->panel_reset) > + intel_dsi->dev.dev_ops->panel_reset(&intel_dsi->dev); > + > temp = I915_READ(MIPI_DEVICE_READY(pipe)); > if ((temp & DEVICE_READY) == 0) { > temp &= ~ULPS_STATE_MASK; > @@ -162,6 +165,9 @@ static void intel_dsi_enable(struct intel_encoder *encoder) > I915_WRITE(MIPI_DEVICE_READY(pipe), temp); > } > > + if (intel_dsi->dev.dev_ops->send_otp_cmds) > + intel_dsi->dev.dev_ops->send_otp_cmds(&intel_dsi->dev); > + > if (is_cmd_mode(intel_dsi)) > I915_WRITE(MIPI_MAX_RETURN_PKT_SIZE(pipe), 8 * 4); > > @@ -176,7 +182,8 @@ static void intel_dsi_enable(struct intel_encoder *encoder) > POSTING_READ(MIPI_PORT_CTRL(pipe)); > } > > - intel_dsi->dev.dev_ops->enable(&intel_dsi->dev); > + if (intel_dsi->dev.dev_ops->enable) > + intel_dsi->dev.dev_ops->enable(&intel_dsi->dev); > } > > static void intel_dsi_disable(struct intel_encoder *encoder) > diff --git a/drivers/gpu/drm/i915/intel_dsi.h b/drivers/gpu/drm/i915/intel_dsi.h > index c7765f3..14509d6 100644 > --- a/drivers/gpu/drm/i915/intel_dsi.h > +++ b/drivers/gpu/drm/i915/intel_dsi.h > @@ -39,6 +39,11 @@ struct intel_dsi_device { > struct intel_dsi_dev_ops { > bool (*init)(struct intel_dsi_device *dsi); > > + void (*panel_reset)(struct intel_dsi_device *dsi); See comments to patch 5/7. > + > + /* one time programmable commands if needed */ > + void (*send_otp_cmds)(struct intel_dsi_device *dsi); > + > /* This callback must be able to assume DSI commands can be sent */ > void (*enable)(struct intel_dsi_device *dsi); > > -- > 1.7.9.5 > > _______________________________________________ > Intel-gfx mailing list > Intel-gfx@lists.freedesktop.org > http://lists.freedesktop.org/mailman/listinfo/intel-gfx
diff --git a/drivers/gpu/drm/i915/intel_dsi.c b/drivers/gpu/drm/i915/intel_dsi.c index d257b09..61267e2 100644 --- a/drivers/gpu/drm/i915/intel_dsi.c +++ b/drivers/gpu/drm/i915/intel_dsi.c @@ -147,6 +147,9 @@ static void intel_dsi_enable(struct intel_encoder *encoder) DRM_DEBUG_KMS("\n"); + if (intel_dsi->dev.dev_ops->panel_reset) + intel_dsi->dev.dev_ops->panel_reset(&intel_dsi->dev); + temp = I915_READ(MIPI_DEVICE_READY(pipe)); if ((temp & DEVICE_READY) == 0) { temp &= ~ULPS_STATE_MASK; @@ -162,6 +165,9 @@ static void intel_dsi_enable(struct intel_encoder *encoder) I915_WRITE(MIPI_DEVICE_READY(pipe), temp); } + if (intel_dsi->dev.dev_ops->send_otp_cmds) + intel_dsi->dev.dev_ops->send_otp_cmds(&intel_dsi->dev); + if (is_cmd_mode(intel_dsi)) I915_WRITE(MIPI_MAX_RETURN_PKT_SIZE(pipe), 8 * 4); @@ -176,7 +182,8 @@ static void intel_dsi_enable(struct intel_encoder *encoder) POSTING_READ(MIPI_PORT_CTRL(pipe)); } - intel_dsi->dev.dev_ops->enable(&intel_dsi->dev); + if (intel_dsi->dev.dev_ops->enable) + intel_dsi->dev.dev_ops->enable(&intel_dsi->dev); } static void intel_dsi_disable(struct intel_encoder *encoder) diff --git a/drivers/gpu/drm/i915/intel_dsi.h b/drivers/gpu/drm/i915/intel_dsi.h index c7765f3..14509d6 100644 --- a/drivers/gpu/drm/i915/intel_dsi.h +++ b/drivers/gpu/drm/i915/intel_dsi.h @@ -39,6 +39,11 @@ struct intel_dsi_device { struct intel_dsi_dev_ops { bool (*init)(struct intel_dsi_device *dsi); + void (*panel_reset)(struct intel_dsi_device *dsi); + + /* one time programmable commands if needed */ + void (*send_otp_cmds)(struct intel_dsi_device *dsi); + /* This callback must be able to assume DSI commands can be sent */ void (*enable)(struct intel_dsi_device *dsi);
Some panels require one time programming if they do not contain their own eeprom for basic register initialization. The sequence is Panel Reset --> Send OTP --> Enable Pixel Stream --> Enable the panel v2: Based on review comments from Jani and Ville - Updated the commit message with more details - Move the new parameters out of this patch Signed-off-by: Yogesh Mohan Marimuthu <yogesh.mohan.marimuthu@intel.com> Signed-off-by: Shobhit Kumar <shobhit.kumar@intel.com> --- drivers/gpu/drm/i915/intel_dsi.c | 9 ++++++++- drivers/gpu/drm/i915/intel_dsi.h | 5 +++++ 2 files changed, 13 insertions(+), 1 deletion(-)