| Message ID | 1384540917-7099-1-git-send-email-idr@freedesktop.org (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
On Fri, Nov 15, 2013 at 10:41:57AM -0800, Ian Romanick wrote: > From: Ian Romanick <ian.d.romanick@intel.com> > > I would have just used the drmIoctl interface directly in Mesa, but the > ioctl needs some data from the drm_intel_context that is not exposed > outside libdrm. > > This ioctl is in the drm-intel-next tree as b635991. > > v2: Update based on Mika's kernel work. > > v3: Fix compile failures from last-minute typos. Sigh. > > v4: Import the actual changes from the kernel i915_drm.h. Only comments > on some fields of drm_i915_reset_stats differed. There are still some > deltas between the kernel i915_drm.h and the one in libdrm, but those > can be resolved in other patches. > > Signed-off-by: Ian Romanick <ian.d.romanick@intel.com> > Reviewed-by: Kenneth Graunke <kenneth@whitecape.org> [v3] > Cc: Mika Kuoppala <mika.kuoppala@intel.com> > Cc: Daniel Vetter <daniel.vetter@ffwll.ch> Looks good to me. Reviewed-by: Damien Lespiau <damien.lespiau@intel.com> > --- > include/drm/i915_drm.h | 19 +++++++++++++++++++ > intel/intel_bufmgr.h | 5 +++++ > intel/intel_bufmgr_gem.c | 34 ++++++++++++++++++++++++++++++++++ > 3 files changed, 58 insertions(+) > > diff --git a/include/drm/i915_drm.h b/include/drm/i915_drm.h > index aa983f3..c1914d6 100644 > --- a/include/drm/i915_drm.h > +++ b/include/drm/i915_drm.h > @@ -198,6 +198,7 @@ typedef struct _drm_i915_sarea { > #define DRM_I915_GEM_SET_CACHEING 0x2f > #define DRM_I915_GEM_GET_CACHEING 0x30 > #define DRM_I915_REG_READ 0x31 > +#define DRM_I915_GET_RESET_STATS 0x32 > > #define DRM_IOCTL_I915_INIT DRM_IOW( DRM_COMMAND_BASE + DRM_I915_INIT, drm_i915_init_t) > #define DRM_IOCTL_I915_FLUSH DRM_IO ( DRM_COMMAND_BASE + DRM_I915_FLUSH) > @@ -247,6 +248,7 @@ typedef struct _drm_i915_sarea { > #define DRM_IOCTL_I915_GEM_CONTEXT_CREATE DRM_IOWR (DRM_COMMAND_BASE + DRM_I915_GEM_CONTEXT_CREATE, struct drm_i915_gem_context_create) > #define DRM_IOCTL_I915_GEM_CONTEXT_DESTROY DRM_IOW (DRM_COMMAND_BASE + DRM_I915_GEM_CONTEXT_DESTROY, struct drm_i915_gem_context_destroy) > #define DRM_IOCTL_I915_REG_READ DRM_IOWR (DRM_COMMAND_BASE + DRM_I915_REG_READ, struct drm_i915_reg_read) > +#define DRM_IOCTL_I915_GET_RESET_STATS DRM_IOWR (DRM_COMMAND_BASE + DRM_I915_GET_RESET_STATS, struct drm_i915_reset_stats) > > /* Allow drivers to submit batchbuffers directly to hardware, relying > * on the security mechanisms provided by hardware. > @@ -943,4 +945,21 @@ struct drm_i915_reg_read { > __u64 offset; > __u64 val; /* Return value */ > }; > + > +struct drm_i915_reset_stats { > + __u32 ctx_id; > + __u32 flags; > + > + /* All resets since boot/module reload, for all contexts */ > + __u32 reset_count; > + > + /* Number of batches lost when active in GPU, for this context */ > + __u32 batch_active; > + > + /* Number of batches lost pending for execution, for this context */ > + __u32 batch_pending; > + > + __u32 pad; > +}; > + > #endif /* _I915_DRM_H_ */ > diff --git a/intel/intel_bufmgr.h b/intel/intel_bufmgr.h > index 7b28a70..34a5750 100644 > --- a/intel/intel_bufmgr.h > +++ b/intel/intel_bufmgr.h > @@ -249,6 +249,11 @@ int drm_intel_reg_read(drm_intel_bufmgr *bufmgr, > uint32_t offset, > uint64_t *result); > > +int drm_intel_get_reset_stats(drm_intel_context *ctx, > + uint32_t *reset_count, > + uint32_t *active, > + uint32_t *pending); > + > /** @{ Compatibility defines to keep old code building despite the symbol rename > * from dri_* to drm_intel_* > */ > diff --git a/intel/intel_bufmgr_gem.c b/intel/intel_bufmgr_gem.c > index dbadc52..0b9252e 100644 > --- a/intel/intel_bufmgr_gem.c > +++ b/intel/intel_bufmgr_gem.c > @@ -3029,6 +3029,40 @@ drm_intel_gem_context_get_hw_context_id(const drm_intel_context *ctx) > } > > int > +drm_intel_get_reset_stats(drm_intel_context *ctx, > + uint32_t *reset_count, > + uint32_t *active, > + uint32_t *pending) > +{ > + drm_intel_bufmgr_gem *bufmgr_gem; > + struct drm_i915_reset_stats stats; > + int ret; > + > + if (ctx == NULL) > + return -EINVAL; > + > + VG_CLEAR(stats); > + > + bufmgr_gem = (drm_intel_bufmgr_gem *)ctx->bufmgr; > + stats.ctx_id = ctx->ctx_id; > + ret = drmIoctl(bufmgr_gem->fd, > + DRM_IOCTL_I915_GET_RESET_STATS, > + &stats); > + if (ret == 0) { > + if (reset_count != NULL) > + *reset_count = stats.reset_count; > + > + if (active != NULL) > + *active = stats.batch_active; > + > + if (pending != NULL) > + *pending = stats.batch_pending; > + } > + > + return ret; > +} > + > +int > drm_intel_reg_read(drm_intel_bufmgr *bufmgr, > uint32_t offset, > uint64_t *result) > -- > 1.8.1.4 > > _______________________________________________ > dri-devel mailing list > dri-devel@lists.freedesktop.org > http://lists.freedesktop.org/mailman/listinfo/dri-devel
diff --git a/include/drm/i915_drm.h b/include/drm/i915_drm.h index aa983f3..c1914d6 100644 --- a/include/drm/i915_drm.h +++ b/include/drm/i915_drm.h @@ -198,6 +198,7 @@ typedef struct _drm_i915_sarea { #define DRM_I915_GEM_SET_CACHEING 0x2f #define DRM_I915_GEM_GET_CACHEING 0x30 #define DRM_I915_REG_READ 0x31 +#define DRM_I915_GET_RESET_STATS 0x32 #define DRM_IOCTL_I915_INIT DRM_IOW( DRM_COMMAND_BASE + DRM_I915_INIT, drm_i915_init_t) #define DRM_IOCTL_I915_FLUSH DRM_IO ( DRM_COMMAND_BASE + DRM_I915_FLUSH) @@ -247,6 +248,7 @@ typedef struct _drm_i915_sarea { #define DRM_IOCTL_I915_GEM_CONTEXT_CREATE DRM_IOWR (DRM_COMMAND_BASE + DRM_I915_GEM_CONTEXT_CREATE, struct drm_i915_gem_context_create) #define DRM_IOCTL_I915_GEM_CONTEXT_DESTROY DRM_IOW (DRM_COMMAND_BASE + DRM_I915_GEM_CONTEXT_DESTROY, struct drm_i915_gem_context_destroy) #define DRM_IOCTL_I915_REG_READ DRM_IOWR (DRM_COMMAND_BASE + DRM_I915_REG_READ, struct drm_i915_reg_read) +#define DRM_IOCTL_I915_GET_RESET_STATS DRM_IOWR (DRM_COMMAND_BASE + DRM_I915_GET_RESET_STATS, struct drm_i915_reset_stats) /* Allow drivers to submit batchbuffers directly to hardware, relying * on the security mechanisms provided by hardware. @@ -943,4 +945,21 @@ struct drm_i915_reg_read { __u64 offset; __u64 val; /* Return value */ }; + +struct drm_i915_reset_stats { + __u32 ctx_id; + __u32 flags; + + /* All resets since boot/module reload, for all contexts */ + __u32 reset_count; + + /* Number of batches lost when active in GPU, for this context */ + __u32 batch_active; + + /* Number of batches lost pending for execution, for this context */ + __u32 batch_pending; + + __u32 pad; +}; + #endif /* _I915_DRM_H_ */ diff --git a/intel/intel_bufmgr.h b/intel/intel_bufmgr.h index 7b28a70..34a5750 100644 --- a/intel/intel_bufmgr.h +++ b/intel/intel_bufmgr.h @@ -249,6 +249,11 @@ int drm_intel_reg_read(drm_intel_bufmgr *bufmgr, uint32_t offset, uint64_t *result); +int drm_intel_get_reset_stats(drm_intel_context *ctx, + uint32_t *reset_count, + uint32_t *active, + uint32_t *pending); + /** @{ Compatibility defines to keep old code building despite the symbol rename * from dri_* to drm_intel_* */ diff --git a/intel/intel_bufmgr_gem.c b/intel/intel_bufmgr_gem.c index dbadc52..0b9252e 100644 --- a/intel/intel_bufmgr_gem.c +++ b/intel/intel_bufmgr_gem.c @@ -3029,6 +3029,40 @@ drm_intel_gem_context_get_hw_context_id(const drm_intel_context *ctx) } int +drm_intel_get_reset_stats(drm_intel_context *ctx, + uint32_t *reset_count, + uint32_t *active, + uint32_t *pending) +{ + drm_intel_bufmgr_gem *bufmgr_gem; + struct drm_i915_reset_stats stats; + int ret; + + if (ctx == NULL) + return -EINVAL; + + VG_CLEAR(stats); + + bufmgr_gem = (drm_intel_bufmgr_gem *)ctx->bufmgr; + stats.ctx_id = ctx->ctx_id; + ret = drmIoctl(bufmgr_gem->fd, + DRM_IOCTL_I915_GET_RESET_STATS, + &stats); + if (ret == 0) { + if (reset_count != NULL) + *reset_count = stats.reset_count; + + if (active != NULL) + *active = stats.batch_active; + + if (pending != NULL) + *pending = stats.batch_pending; + } + + return ret; +} + +int drm_intel_reg_read(drm_intel_bufmgr *bufmgr, uint32_t offset, uint64_t *result)